[RACL] Implement config parsing, racl_ctrl, and reggen checks #3550
Triggered via pull request
December 17, 2024 15:24
Status
Success
Total duration
4h 48m 35s
Artifacts
31
ci.yml
on: pull_request
Lint (quick)
4m 53s
Earl Grey for CW310 Hyperdebug
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Build bitstream
1h 15m
Lint (slow)
15m 15s
Build documentation
5m 2s
Airgapped build
10m 54s
Verible lint
1m 8s
Run OTBN smoke Test
2m 27s
Run OTBN crypto tests
20m 55s
Verilated English Breakfast
7m 55s
Verilated Earl Grey
1h 21m
CW305's Bitstream
25m 12s
Build Docker Containers
2m 47s
Build and test software
18m 17s
CW310 SiVal Tests
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FPGA test
25m 21s
CW310 SiVal ROM_EXT Tests
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FPGA test
34m 35s
CW310 Manufacturing Tests
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FPGA test
30m 11s
CW310 Test ROM Tests
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FPGA test
5m 13s
CW310 ROM Tests
/
FPGA test
39m 24s
CW310 ROM_EXT Tests
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FPGA test
6m 39s
CW340 Test ROM Tests
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FPGA test
3m 15s
CW340 ROM Tests
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FPGA test
47s
CW340 ROM_EXT Tests
/
FPGA test
5m 31s
CW340 SiVal Tests
/
FPGA test
16m 45s
CW340 SiVal ROM_EXT Tests
/
FPGA test
3m 53s
CW340 Manufacturing Tests
/
FPGA test
7m 21s
Cache bitstreams to GCP
0s
Verify FPGA jobs
33s
Annotations
8 errors
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Countermeasure check failed.
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Process completed with exit code 1.
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Lint (slow)
Some target names have banned characters.
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Process completed with exit code 1.
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Lint (slow)
Process completed with exit code 1.
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Lint (slow)
Countermeasure check failed.
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Lint (slow)
Process completed with exit code 1.
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Build and test software
Process completed with exit code 1.
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Artifacts
Produced during runtime
Name | Size | |
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chip_englishbreakfast_cw305
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1.37 MB |
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execute_manuf_fpga_tests_cw310-targets
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623 Bytes |
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execute_manuf_fpga_tests_cw310-test-results
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58.3 KB |
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execute_manuf_fpga_tests_cw340-targets
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280 Bytes |
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execute_manuf_fpga_tests_cw340-test-results
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17.4 KB |
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execute_rom_ext_fpga_tests_cw310-targets
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379 Bytes |
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execute_rom_ext_fpga_tests_cw310-test-results
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4.96 KB |
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execute_rom_ext_fpga_tests_cw340-targets
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363 Bytes |
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execute_rom_ext_fpga_tests_cw340-test-results
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5.65 KB |
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execute_rom_fpga_tests_cw310-targets
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1.8 KB |
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execute_rom_fpga_tests_cw310-test-results
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46.9 KB |
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execute_rom_fpga_tests_cw340-targets
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162 Bytes |
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execute_rom_fpga_tests_cw340-test-results
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201 Bytes |
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execute_sival_fpga_tests_cw310-targets
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784 Bytes |
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execute_sival_fpga_tests_cw310-test-results
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36.4 KB |
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execute_sival_fpga_tests_cw340-targets
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502 Bytes |
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execute_sival_fpga_tests_cw340-test-results
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39.9 KB |
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execute_sival_rom_ext_fpga_tests_cw310-targets
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2.21 KB |
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execute_sival_rom_ext_fpga_tests_cw310-test-results
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178 KB |
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execute_sival_rom_ext_fpga_tests_cw340-targets
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435 Bytes |
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execute_sival_rom_ext_fpga_tests_cw340-test-results
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15.8 KB |
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execute_test_rom_fpga_tests_cw310-targets
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312 Bytes |
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execute_test_rom_fpga_tests_cw310-test-results
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2.88 KB |
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execute_test_rom_fpga_tests_cw340-targets
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258 Bytes |
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execute_test_rom_fpga_tests_cw340-test-results
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45.3 KB |
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partial-build-bin-chip_earlgrey_cw310
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6.02 MB |
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partial-build-bin-chip_earlgrey_cw310_hyperdebug
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6.05 MB |
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partial-build-bin-chip_earlgrey_cw340
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9.81 MB |
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sw_build_test-test-results
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59.8 KB |
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verilated_englishbreakfast
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6.54 MB |
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verilator_earlgrey-test-results
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9.05 KB |
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