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blog/2015/04/lowrisc-tagged-memory-preview-release/index.html
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| <!doctype html><html lang=en><head><meta charset=utf-8><meta name=viewport content="width=device-width,initial-scale=1,viewport-fit=cover"><base href=https://www.lowrisc.org><link rel=icon type=image/png sizes=32x32 href=/favicon.png><title>lowRISC tagged memory preview release · lowRISC: Collaborative open silicon engineering</title><link href=/main.b716e.css rel=stylesheet></head><body><header><nav class="navbar navbar-expand-md navbar-light"><div class=container><a class=navbar-brand href=#><img src=/img/logo/logo-dualcolor.svg alt=lowRISC></a> | ||
| <button class=navbar-toggler type=button data-toggle=collapse data-target=#navbarCollapse aria-controls=navbarCollapse aria-expanded=false aria-label="Toggle navigation"> | ||
| <span class=navbar-toggler-icon></span></button><div class="collapse navbar-collapse" id=navbarCollapse><ul class="navbar-nav ml-auto"><li class=nav-item><a href=/our-work class=nav-link>Our work</a></li><li class=nav-item><a href=/open-silicon class=nav-link>Open Silicon</a></li><li class=nav-item><a href=/community class=nav-link>Community</a></li><li class=nav-item><a href=/blog class=nav-link>Blog</a></li><li class=nav-item><a href=/jobs class=nav-link>Jobs</a></li><li class=nav-item><a href=/about class=nav-link>About us</a></li><li class=nav-item><a class="btn lr-navbar-btn-gh" href=https://github.com/lowrisc>GitHub</a></li></ul></div></div></nav></header><main role=main><div class="container lr-blog"><article><h1>lowRISC tagged memory preview release</h1><address class=lr-blog-author><time>April 13, 2015</time></address><p>We’re pleased to announce the <a href=https://www.lowrisc.org/docs/tagged-memory-v0.1/>first lowRISC preview release</a>, demonstrating support for tagged memory as | ||
| described in <a href=https://www.lowrisc.org/docs/memo-2014-001-tagged-memory-and-minion-cores/>our memo</a>. Our ambition with lowRISC is to provide an open-source System-on-Chip | ||
| platform for others to build on, along with low-cost development boards | ||
| featuring a reference implementation. Although there’s more work to be done on | ||
| the tagged memory implementation, now seemed a good time to document what | ||
| we’ve done in order for the wider community to take a look. Please see our | ||
| <a href=https://www.lowrisc.org/docs/tagged-memory-v0.1/>full tutorial</a> which describes in some | ||
| detail the changes we’ve made to the Berkeley <a href=https://github.com/ucb-bar/rocket>Rocket | ||
| core</a>, as well as how you can build and try | ||
| it out for yourself (either in simulation, or on an FPGA). We’ve gone to some | ||
| effort to produce this documentation, both to document our work, and to share | ||
| our experiences building upon the Berkeley RISC-V code releases in the hopes | ||
| they’ll be useful to other groups.</p><p>The initial motivation for tagged memory was to prevent control-flow hijacking | ||
| attacks, though there are a range of other potential uses including | ||
| fine-grained memory synchronisation, garbage collection, and debug tools.<br>Please note that the instructions used to manipulate tagged memory in this | ||
| release (<code>ltag</code> and <code>stag</code>) are only temporary and chosen simply because they | ||
| require minimal changes to the core pipeline. Future work will include | ||
| exploring better ISA support, collecting performance numbers across a range of | ||
| tagged memory uses and tuning the tag cache. We are also working on developing | ||
| an ‘untethered’ version of the SoC with the necessary peripherals integrated | ||
| for standalone operation.</p><p>If you’ve visited lowrisc.org before, you’ll have noticed we’ve changed a few | ||
| things around. Keep an eye on this blog (and its <a href=https://www.lowrisc.org/index.xml>RSS | ||
| feed</a>) to keep an eye on developments - we | ||
| expect to be updating at least every couple of weeks. We’re very grateful to | ||
| the RISC-V team at Berkeley for all their support and guidance. A large | ||
| portion of the credit for this initial code release goes to <a href=http://wsong83.github.io/>Wei | ||
| Song</a>, who’s been working tirelessly on the HDL | ||
| implementation.</p></article></div></main><footer class=lr-footer><div class=container><div class=row><div class="col-lg-2 d-none d-lg-block"><img src=/img/logo/logo-dualcolor.svg width=150px></div><div class=col><p><small>The text content on this website is licensed under a <a href=https://creativecommons.org/licenses/by/4.0/>Creative Commons Attribution 4.0 International License</a>, except where otherwise noted. No license is granted for logos or other trademarks. Other content © lowRISC Contributors.</small></p><p><small><a href=/privacy-policy>Privacy and cookies policy</a> | ||
| · <a href=/usage-licence>Usage licence</a></small></p></div><div class=col-lg-2><p><a href=#>Back to top</a></p></div></div></div></footer><script src=/main.b716e.js></script></body></html> | ||
| <!doctype html><html><head><title>https://www.lowrisc.org/news/2015/04/lowrisc-tagged-memory-preview-release/</title><link rel=canonical href=https://www.lowrisc.org/news/2015/04/lowrisc-tagged-memory-preview-release/><meta name=robots content="noindex"><meta charset=utf-8><meta http-equiv=refresh content="0; url=https://www.lowrisc.org/news/2015/04/lowrisc-tagged-memory-preview-release/"></head></html> |
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blog/2015/05/summer-of-code-students-for-lowrisc/index.html
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| <!doctype html><html lang=en><head><meta charset=utf-8><meta name=viewport content="width=device-width,initial-scale=1,viewport-fit=cover"><base href=https://www.lowrisc.org><link rel=icon type=image/png sizes=32x32 href=/favicon.png><title>Summer of Code students for lowRISC · lowRISC: Collaborative open silicon engineering</title><link href=/main.b716e.css rel=stylesheet></head><body><header><nav class="navbar navbar-expand-md navbar-light"><div class=container><a class=navbar-brand href=#><img src=/img/logo/logo-dualcolor.svg alt=lowRISC></a> | ||
| <button class=navbar-toggler type=button data-toggle=collapse data-target=#navbarCollapse aria-controls=navbarCollapse aria-expanded=false aria-label="Toggle navigation"> | ||
| <span class=navbar-toggler-icon></span></button><div class="collapse navbar-collapse" id=navbarCollapse><ul class="navbar-nav ml-auto"><li class=nav-item><a href=/our-work class=nav-link>Our work</a></li><li class=nav-item><a href=/open-silicon class=nav-link>Open Silicon</a></li><li class=nav-item><a href=/community class=nav-link>Community</a></li><li class=nav-item><a href=/blog class=nav-link>Blog</a></li><li class=nav-item><a href=/jobs class=nav-link>Jobs</a></li><li class=nav-item><a href=/about class=nav-link>About us</a></li><li class=nav-item><a class="btn lr-navbar-btn-gh" href=https://github.com/lowrisc>GitHub</a></li></ul></div></div></nav></header><main role=main><div class="container lr-blog"><article><h1>Summer of Code students for lowRISC</h1><address class=lr-blog-author><time>May 13, 2015</time></address><p>lowRISC was fortunate enough to be chosen as a mentoring organisation in this | ||
| year’s <a href=https://developers.google.com/open-source/soc/>Google Summer of | ||
| Code</a>. The Google Summer of | ||
| Code program funds students to work on open source projects over the summer. | ||
| We had 52 applications across the <a href=https://www.lowrisc.org/docs/gsoc-2015-ideas/>range of project | ||
| ideas</a> we’ve been advertising. | ||
| As you can see from the range of project ideas, lowRISC is taking part as an | ||
| umbrella organisation, working with a number of our friends in the wider open | ||
| source software and hardware community. | ||
| We were allocated three slots from Google, and given the volume of high | ||
| quality applications making the selection was tremendously difficult. We have | ||
| actually been able to fund an additional three applicants from other sources, | ||
| but even then there were many promising projects we couldn’t support. We are | ||
| extremely grateful to all the students who put so much time and effort in to | ||
| their proposals, and to everyone who volunteered to mentor. The six ‘summer of | ||
| code’ projects for lowRISC are:</p><ul><li><p><a href=http://www.google-melange.com/gsoc/project/details/google/gsoc2015/asy/5757334940811264>An online Verilog IDE based on | ||
| YosysJS</a>. | ||
| Baptiste Duprat mentored by Clifford Wolf</p><ul><li>Baptiste will be working with an Emscripten-compiled version of | ||
| the <a href=http://www.clifford.at/yosys/>Yosys</a> logic synthesis tool, building an | ||
| online Verilog IDE on top | ||
| of it which would be particularly suitable for training and teaching | ||
| materials. A big chunk of the proposed work is related to visualisation of the | ||
| generated logic. Improving the accessibility of hardware design is essential for | ||
| growing the potential contributor base to open source hardware | ||
| projects like lowRISC, and this is just the start of our efforts in that | ||
| space.</li></ul></li><li><p><a href=http://www.google-melange.com/gsoc/project/details/google/gsoc2015/hesham/5868011953061888>Porting seL4 to | ||
| RISC-V</a>. | ||
| Hesham ALMatary mentored by Stefan Wallentowitz</p><ul><li><a href=https://sel4.systems/>seL4</a> is a formally verified microkernel, which | ||
| currently has ports | ||
| for x86 and ARM. Hesham will be performing a complete port to | ||
| RISC-V/lowRISC. Security and microkernels are of great interest to | ||
| many in the community. It’s also a good opportunity to expand RISC-V platform | ||
| support and to put the recently released <a href=https://blog.riscv.org/2015/05/risc-v-draft-privileged-architecture-version-1-7-released/>RISC-V Privileged Architecture | ||
| Specification</a> | ||
| through its paces. Hesham previously performed a port of RTEMS to | ||
| OpenRISC.</li></ul></li><li><p><a href=http://www.google-melange.com/gsoc/project/details/google/gsoc2015/prannoy1994/5651442522128384>Porting jor1k to | ||
| RISC-V</a>. | ||
| Prannoy Pilligundla mentored by Sebastian Macke</p><ul><li><a href=https://s-macke.github.io/jor1k/>jor1k</a> is by far the | ||
| <a href=https://github.com/s-macke/jor1k/wiki/Benchmark-with-other-emulators>fastest</a> | ||
| Javascript-based full system | ||
| simulator. It also features a network device, filesystem support, and | ||
| a framebuffer. Prannoy will be adding support for RISC-V and look at | ||
| supporting some of the features we offer on lowRISC such as <a href=https://www.lowrisc.org/docs/memo-2014-001-tagged-memory-and-minion-cores/>minion | ||
| cores or tagged | ||
| memory</a>. | ||
| This will be great not only as a demo, but | ||
| also have practical uses in tutorial or educational material.</li></ul></li><li><p>TCP offload to minion cores using rump kernels. Sebastian Wicki | ||
| mentored by Justin Cormack</p><ul><li>The intention here is to get a <a href=http://rumpkernel.org/>rump kernel</a> | ||
| (essentially a libified | ||
| NetBSD) running bare-metal on a simple RISC-V system and evaluate | ||
| exposing the TCP/IP stack for use by other cores. e.g. a TCP/IP | ||
| offload engine running on a minion core. TCP offload is a good | ||
| starting point, but of course the same concept could be applied | ||
| elsewhere. For example, running a USB mass storage driver (and filesystem | ||
| implementation) on a minion core and providing a simple high-level | ||
| interface to the application cores.</li></ul></li><li><p>Extend Tavor to support directed generation of assembly test cases. | ||
| Yoann Blein mentored by Markus Zimmermann</p><ul><li><a href=https://github.com/zimmski/tavor>Tavor</a> is a sophisticated fuzzing tool | ||
| implemented in Go. Yoann | ||
| will be extending it to more readily support specifying instruction | ||
| set features and generating a fuzzing suite targeting an ISA such as | ||
| RISC-V. Yoann has some really interesting ideas on how to go about | ||
| this, so I’m really interested in seeing where this on ends up.</li></ul></li><li><p>Implement a Wishbone to TileLink bridge and extend TileLink | ||
| documentation. Thomas Repetti mentored by Wei Song</p><ul><li><a href=http://en.wikipedia.org/wiki/Wishbone_%28computer_bus%29>Wishbone</a> is the | ||
| interconnect of choice for most existing open | ||
| source IP cores, including most devices on | ||
| <a href=http://opencores.org/>opencores.org</a>. The Berkeley | ||
| <a href=https://github.com/ucb-bar/rocket-chip>Rocket</a> RISC-V implementation uses | ||
| their own ‘TileLink’ protocol (we provide a <a href=https://www.lowrisc.org/docs/tagged-memory-v0.1/rocket-chip/>brief | ||
| overview</a>. By providing a | ||
| reusable bridge, this project will allow the easy reuse of opencores devices | ||
| and leverage the many man-years of effort that has already gone in to them.</li></ul></li></ul><p>The first 3 of the above projects are part of Google Summer of Code | ||
| and the bottom 3 directly funded, operating over roughly the same timeline. | ||
| We’re also going to be having two local | ||
| students interning with us here at the University of Cambridge | ||
| Computer Lab starting towards the end of June, so it’s going to be a | ||
| busy and productive summer. It bears repeating just how much we appreciate the | ||
| support of everyone involved so far - Google through their Summer of Code | ||
| initiative, the students, and those who’ve offered to act as mentors. We’re | ||
| very excited about these projects, so please join us in welcoming the students | ||
| involved to our community. If you have any questions, suggestions, or guidance | ||
| please do leave them in the comments.</p><p><em>Alex Bradbury</em></p></article></div></main><footer class=lr-footer><div class=container><div class=row><div class="col-lg-2 d-none d-lg-block"><img src=/img/logo/logo-dualcolor.svg width=150px></div><div class=col><p><small>The text content on this website is licensed under a <a href=https://creativecommons.org/licenses/by/4.0/>Creative Commons Attribution 4.0 International License</a>, except where otherwise noted. No license is granted for logos or other trademarks. Other content © lowRISC Contributors.</small></p><p><small><a href=/privacy-policy>Privacy and cookies policy</a> | ||
| · <a href=/usage-licence>Usage licence</a></small></p></div><div class=col-lg-2><p><a href=#>Back to top</a></p></div></div></div></footer><script src=/main.b716e.js></script></body></html> | ||
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