[rtl] Expose ICacheScrNumPrinceRoundsHalf parameter #2164
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FYI: This is needed for OpenTitan where the ICache scrambling is acceptable to be slightly weaker compared to the scrambling of the main SRAM. |
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I think this is changing behaviour because the currently checked-in version of the prim has a default of 2 (in the Ibex repository).
Is the change intentional? If so, would you mind doing it as two commits? The first could be a no-op and pass the default value, which would mean all the line noise from the reformatting was for the no-op. Then the second commit would be a 1-line 2->3 change.
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It's correct that the currently checked in version of the prim uses 2 half rounds. In upstream OpenTitan it's 3 already and we need to move back to 2 for just the ICache. If we re-vendored in the prims from OT, it would be 3 as a default here too. |
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Would you prefer me switching to 2 here? |
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I think I'm suggesting switching it to 2 here to keep things unchanged locally. Then presumably |
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Oh! Sorry! Now I understand (having read both messages...) I guess I'd suggest leaving things so that we have the values from the prim that is currently vendored into Ibex. If not, I'd definitely split the change out to a separate commit in the same PR. |
This parameter allows integrators controlling the number of PRINCE half rounds in the scrambled ICache SRAM primitives, e.g., to balance timing impact and security guarantees. Signed-off-by: Pirmin Vogel <[email protected]>
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Alright, I've switched it to 2 in this PR. |
This parameter allows integrators controlling the number of PRINCE half rounds in the scrambled ICache SRAM primitives, e.g., to balance timing impact and security guarantees.