Updated verilator waivers so the sim builds.

Signed-off-by: Hugo McNally <[email protected]>
lowRISC · Jan 31, 2024 · 4a3b92b · 4a3b92b
1 parent 3bfbba8
commit 4a3b92b
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Showing 2 changed files with 4 additions and 2 deletions.
diff --git a/dv/verilator/demo_system_verilator_lint.vlt b/dv/verilator/demo_system_verilator_lint.vlt
@@ -25,4 +25,6 @@ lint_off -rule PINMISSING -file "*pulp_riscv_dbg*"
 lint_off -rule UNUSED -file "*ibex_register_file_fpga*"
 
 lint_off -rule UNOPTFLAT -file "*/lowrisc_prim_fifo_0/rtl/prim_fifo_async_simple.sv"
-lint_off -rule WIDTHEXPAND -file "*pulp_riscv_dbg/src/dm_mem.sv"
+lint_off -rule WIDTH -file "*pulp_riscv_dbg/src/dm_mem.sv"
+lint_off -rule UNDRIVEN -file "*ibex_register_file_fpga.sv"
+lint_off -rule IMPERFECTSCH -file "*prim_flop_2sync.sv"
diff --git a/ibex_demo_system_core.core b/ibex_demo_system_core.core
@@ -24,7 +24,7 @@ filesets:
 
   files_lint_verilator:
     files:
-      - lint/verilator_waiver.vlt: {file_type: vlt}
+      - vendor/lowrisc_ibex/lint/verilator_waiver.vlt: {file_type: vlt}
 
 targets:
   default: