Merge branch 'devel'

lnls-dig · Jul 18, 2024 · 3bb1fac · 3bb1fac
2 parents 3b7ae35 + 3829dfe
commit 3bb1fac
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diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
@@ -14,12 +14,12 @@ jobs:
     strategy:
       matrix:
         build-flags:
-          - { flags: -DBOARD=afc-bpm -DVERSION=3.1 } 
-          - { flags: -DBOARD=afc-timing -DBOARD_RTM=8sfp }
-          - { flags: -DBOARD=afc-v4 }
-          - { flags: -DBOARD=afc-v4 -DDEBUG_PROBE=jlink -DOPENOCD_TRANSPORT=swd }
-          - { flags: -DBOARD=afc-v4 -DDEBUG_PROBE=cmsis-dap -DOPENOCD_TRANSPORT=swd }
-          - { flags: -DBOARD=afc-v4 -DDEBUG_PROBE=digilent_jtag_hs3 -DOPENOCD_TRANSPORT=jtag }
+          - { flags: -DBOARD=afc -DVERSION=3.1 -DBOARD_RTM=8sfp }
+          - { flags: -DBOARD=afc -DVERSION=4.0 -DBOARD_RTM=lamp}
+          - { flags: -DBOARD=afc -DVERSION=4.0 -DBOARD_RTM=lamp -DDEBUG_PROBE=jlink -DOPENOCD_TRANSPORT=swd }
+          - { flags: -DBOARD=afc -DVERSION=4.0 -DBOARD_RTM=lamp -DDEBUG_PROBE=cmsis-dap -DOPENOCD_TRANSPORT=swd }
+          - { flags: -DBOARD=afc -DVERSION=4.0 -DBOARD_RTM=lamp -DDEBUG_PROBE=digilent_jtag_hs3 -DOPENOCD_TRANSPORT=jtag }
+          - { flags: -DBOARD=afc -DVERSION=4.0 -DBOARD_RTM=lamp -DDEBUG_PROBE=xvc -DOPENOCD_TRANSPORT=jtag -DXVC_HOST=host -DXVC_PORT=0000}
     steps:
       - uses: actions/checkout@v3
         with:

diff --git a/README.md b/README.md
@@ -27,13 +27,13 @@ Create a new folder wherever is suitable
 
 	cd <build_folder>
 
-Run CMake using the path to the repository folder as an direct argument and the flag `-DBOARD=<board_name>` and `-DVERSION=<board_version>` to configure the compilation scripts to your specific board hardware
+Run CMake using the path to the repository folder as an direct argument and the flag `-DBOARD=<board_name>`(at this moment, only `afc` can be selected) ,`-DVERSION=<board_version>` (`3.1` or `4.0`) and `-DBOARD_RTM=<rtm_name>` (`8sfp` or `lamp`) to configure the compilation scripts to your specific board hardware.
 
-	cmake <path_to_source> -DBOARD=<board_name> -DVERSION=<board_version>
+	cmake <path_to_source> -DBOARD=<board_name> -DVERSION=<board_version> -DBOARD_RTM=<rtm_name>
 
 Example:
 
-	cmake ~/openmmc/ -DBOARD=afc -DVERSION=3.1
+	cmake ~/openmmc/ -DBOARD=afc -DVERSION=3.1 -DBOARD_RTM=8sfp
 
 After creating the build files with CMake, you can compile the firmware using `make`, optionally setting the VERBOSE flag to 1 if you wish to see all the compilation commands
 
@@ -52,7 +52,7 @@ To make a debug build (to include symbols into elf file, turn off optimizations,
 ## Programming
 
 ### OpenOCD
-Flashing the MMC microcontroller via SWD/JTAG is supported for CMSIS-DAP and Jlink compatible probes through OpenOCD. You can specify the debug probe with the flag `-DDEBUG_PROBE=<probe_name>`, valid options are `cmsis-dap` (default) and `jlink`.
+Flashing the MMC microcontroller via SWD/JTAG is supported for CMSIS-DAP and Jlink compatible probes through OpenOCD. You can specify the debug probe with the flag `-DDEBUG_PROBE=<probe_name>`, valid options are `cmsis-dap` (default), `jlink`, `digilent_jtag_hs3` and `xvc` (support is not merged to the official OpenOCD source yet, so you build our patched version: https://github.com/lnls-dig/openocd/tree/fix-afcv3-flashing).
 
 	cmake ~/openmmc/ -DBOARD=afc -DVERSION=3.1 -DDEBUG_PROBE=cmsis-dap
 
@@ -93,6 +93,8 @@ It's also important to mention that you can use the `--help` command in case of
 	./bin/hpm-downloader --help
 
 ### ipmitool
+> :warning: **Disclaimer:** Due to [e88b30b](https://github.com/lnls-dig/openMMC/tree/e88b30b26c9dc05662d84e35b51fc81d7ecf7561), the ipmitool may fail when trying to upgrade the firmware from v1.5.0. You can use a modified ipmitool utility as a workaround, setting the variable [`max_rq_size`](https://codeberg.org/IPMITool/ipmitool/src/commit/137aeb64cbb493d61d6945cac156aba5f0510780/lib/ipmi_hpmfwupg.c#L1143) to 20.
+
 After [5631857](https://github.com/lnls-dig/openMMC/commit/563185791c8b51ea026680c98ec0ea9587ea645b), it's possible to program the firmware and the bootloader through [ipmitool](https://codeberg.org/IPMITool/ipmitool), for previous releases, you still need to use [hpm-downloader](https://github.com/lnls-dig/hpm-downloader). In order to use it, you have to install the ipmitool, and then generate .hpm files from `OpenMMC.bin` and `newboot.bin`. To generate `.hpm` files, you will need to use [bin2hpm](https://github.com/MicroTCA-Tech-Lab/bin2hpm). If you have bin2hpm in your `$PATH`, the `.hpm` files will be automatically generated for you, provided you build from [0095b14](https://github.com/lnls-dig/openMMC/commit/0095b14667afe844113725228671d8810b45d9e0) or more recent versions.
 After generate the files, you can use the following commands to program the MMC microcontroller.
 To upgrade the firmware, use
@@ -103,6 +105,18 @@ To upgrade the bootloader, use
 
     ipmitool -I lan -H host_name_mch -A none -T 0x82 -m 0x20 -t (112 + num_slot*2 in hexadecimal) hpm upgrade newboot.hpm activate
 
+### nxpprog
+> :warning: **Disclaimer:** Only supported in AFCv4.0.2
+
+In AFCv4, it's possible to program the firmware and bootloader via serial port using [nxpprog](https://github.com/lnls-dig/nxpprog). In order to use it, install nxpprog and then execute the following commands:
+To upgrade the application, use
+
+    ./nxpprog.py  <serial_device> <path_to_openMMC.bin> --addr 0x20000 --control
+
+To upgrade the bootloader, use
+
+    ./nxpprog.py  <serial_device> <path_to_newboot.bin> --control
+
 ## Debugging
 It is possible to debug the MMC firmware using OpenOCD and GDB. First, connect OpenOCD with the debug probe using the `out/openocd.cfg` file generated by cmake in the build directory:
 
@@ -118,3 +132,42 @@ Now you can use the typical GDB commands to inspect the program flow and variabl
 	(gdb) monitor reset halt # Resets the microcontroller and immediately halts
 	(gdb) monitor reset run  # Resets the microcontroller and starts executing
 	(gdb) load               # Reload the firmware into flash
+
+
+## IPMI Custom Commands
+The IPMI allow us to create custom commands according to the project needs. [ipmitool](https://codeberg.org/IPMITool/ipmitool) can be used to send the commands
+
+### Get free heap memory
+It is possible to monitor the MMC's memory usage via IPMI. To obtain the total free heap use command 0x01, netfn_id 0x32. The returned data will be the number of free heap bytes, encoded as a 32 bits unsigned integer, little-endian.
+
+    ipmitool -I lan -H mch_host_name -A none -T 0x82 -m 0x20 -t (112 + num_slot*2) raw 0x32 0x01
+
+### Commit Hash read
+After loading a new firmware, you can use an ipmi command to read its commit hash to ensure that the running version is the one you want.
+The command is the above:
+
+
+    ipmitool -I lan -H mch_host_name -A none -T 0x82 -m 0x20 -t (112 + num_slot*2) raw 0x32 0x02
+
+### Clock switch configuration
+After [7a919489](https://github.com/lnls-dig/openMMC/tree/7a91948975f87f6613b28fc1ea562a2a7bb3c475) the clock switch configuration is no longer hardcoded for each board. Instead, it must be configured through an IPMI command.
+
+For the AFC v3.1 (ADN4604ASVZ) you can use the [script](/scripts/afcv3.1-clksw-config.py) for generate the configuration, and use the json configuration for [AFCv3.1-BPM](/config/lnls/afcv3.1-bpm-clk-cfg.json) or [AFCv3.1-Timing](/config/lnls/afcv3.1-timing-clk-cfg.json). If you want to generate a new configuration, use the following scheme:
+- **Port I/O (bit 7)**: Use it to configure the port as an input ('0') or output ('1'). Unused ports should be left configured as inputs;
+- **Output Port Signal Source (bits 0 to 3)**: Select the input port for the respective output port.
+
+For the AFC v4 (IDT 8V54816) you can use the following scheme:
+For the AFC v4.0 (IDT 8V54816) you can use the [script](/scripts/afcv4-clksw-config.py) for generate the configuration, and use the json configuration for [AFCv4.0-FOFB](/config/lnls/afcv4-fofb-clk-cfg.json). If you want to generate a new configuration, use the following scheme:
+- **Port I/O (bit 7)**: Use it to configure the port as an input ('0') or output ('1'). Unused ports should be left configured as inputs;
+- **Termination On/Off (bit 6)**: Use to set the internal termination. '0' is off (high-impedance), '1' is on (100 $\Omega$)
+- **Polarity (bit 5)**: Set the channel polarity. '0' for inverted, '1' for non-inverted
+- **Output Port Signal Source (bits 0 to 3)**: Select the input port for the respective output port.
+
+
+The command to write the configuration is the above:
+
+    ipmitool -I lan -H mch_host_name -A none -T 0x82 -m 0x20 -t (112 + num_slot*2) raw 0x32 0x03 <configuration_array_in_hex>
+
+To read the actual configuration, use:
+
+    ipmitool -I lan -H mch_host_name -A none -T 0x82 -m 0x20 -t (112 + num_slot*2) raw 0x32 0x04
diff --git a/config/lnls/afcv3.1-bpm-clk-cfg.json b/config/lnls/afcv3.1-bpm-clk-cfg.json
@@ -0,0 +1,119 @@
+{
+ "afc_ver": "3.1",
+ "in_cfg": {
+  "FMC2_CLK3_BIDIR": {
+   "POL": "POS"
+  },
+  "FMC2_CLK1_M2": {
+   "POL": "POS"
+  },
+  "FMC2_CLK0_M2C": {
+   "POL": "POS"
+  },
+  "FMC2_CLK2_BIDIR": {
+   "POL": "POS"
+  },
+  "TCLKB": {
+   "POL": "POS"
+  },
+  "TCLKA": {
+   "POL": "POS"
+  },
+  "TCLKC": {
+   "POL": "POS"
+  },
+  "TCLKD": {
+   "POL": "POS"
+  },
+  "FCLKA": {
+   "POL": "POS"
+  },
+  "FMC1_CLK3_BIDIR": {
+   "POL": "POS"
+  },
+  "FMC1_CLK1_M2C": {
+   "POL": "POS"
+  },
+  "FMC1_CLK0_M2C": {
+   "POL": "POS"
+  },
+  "FMC1_CLK2_BIDIR": {
+   "POL": "POS"
+  },
+  "WR_PLL_CLK1": {
+   "POL": "POS"
+  },
+  "CLK20_VCXO": {
+   "POL": "POS"
+  },
+  "SI57X_CLK": {
+   "POL": "POS"
+  }
+ },
+ "out_cfg": {
+  "TCLKD": {
+   "SRC": "FMC2_CLK3_BIDIR",
+   "EN": false
+  },
+  "TCLKC": {
+   "SRC": "FMC2_CLK3_BIDIR",
+   "EN": false
+  },
+  "TCLKA": {
+   "SRC": "FMC2_CLK3_BIDIR",
+   "EN": false
+  },
+  "TCLKB": {
+   "SRC": "FMC2_CLK3_BIDIR",
+   "EN": false
+  },
+  "FPGA_CLK1": {
+   "SRC": "WR_PLL_CLK1",
+   "EN": true
+  },
+  "FP2_CLK2": {
+   "SRC": "FCLKA",
+   "EN": false
+  },
+  "LINK01_CLK": {
+   "SRC": "TCLKA",
+   "EN": true
+  },
+  "FP2_CLK1": {
+   "SRC": "SI57X_CLK",
+   "EN": true
+  },
+  "PCIE_CLK1": {
+   "SRC": "FCLKA",
+   "EN": true
+  },
+  "LINK23_CLK": {
+   "SRC": "TCLKA",
+   "EN": false
+  },
+  "FIN1_CLK3": {
+   "SRC": "TCLKA",
+   "EN": true
+  },
+  "FIN1_CLK2": {
+   "SRC": "TCLKA",
+   "EN": true
+  },
+  "RTM_SYNC_CLK": {
+   "SRC": "CLK20_VCXO",
+   "EN": false
+  },
+  "OP15C": {
+   "SRC": "TCLKA",
+   "EN": true
+  },
+  "FIN2_CLK2": {
+   "SRC": "TCLKA",
+   "EN": true
+  },
+  "FIN2_CLK3": {
+   "SRC": "TCLKA",
+   "EN": true
+  }
+ }
+}
diff --git a/config/lnls/afcv3.1-timing-clk-cfg.json b/config/lnls/afcv3.1-timing-clk-cfg.json
@@ -0,0 +1,119 @@
+{
+ "afc_ver": "3.1",
+ "in_cfg": {
+  "FMC2_CLK3_BIDIR": {
+   "POL": "POS"
+  },
+  "FMC2_CLK1_M2": {
+   "POL": "POS"
+  },
+  "FMC2_CLK0_M2C": {
+   "POL": "POS"
+  },
+  "FMC2_CLK2_BIDIR": {
+   "POL": "POS"
+  },
+  "TCLKB": {
+   "POL": "POS"
+  },
+  "TCLKA": {
+   "POL": "POS"
+  },
+  "TCLKC": {
+   "POL": "POS"
+  },
+  "TCLKD": {
+   "POL": "POS"
+  },
+  "FCLKA": {
+   "POL": "POS"
+  },
+  "FMC1_CLK3_BIDIR": {
+   "POL": "POS"
+  },
+  "FMC1_CLK1_M2C": {
+   "POL": "POS"
+  },
+  "FMC1_CLK0_M2C": {
+   "POL": "POS"
+  },
+  "FMC1_CLK2_BIDIR": {
+   "POL": "POS"
+  },
+  "WR_PLL_CLK1": {
+   "POL": "POS"
+  },
+  "CLK20_VCXO": {
+   "POL": "POS"
+  },
+  "SI57X_CLK": {
+   "POL": "POS"
+  }
+ },
+ "out_cfg": {
+  "TCLKD": {
+   "SRC": "FMC2_CLK3_BIDIR",
+   "EN": false
+  },
+  "TCLKC": {
+   "SRC": "FMC2_CLK3_BIDIR",
+   "EN": false
+  },
+  "TCLKA": {
+   "SRC": "FMC2_CLK3_BIDIR",
+   "EN": false
+  },
+  "TCLKB": {
+   "SRC": "SI57X_CLK",
+   "EN": true
+  },
+  "FPGA_CLK1": {
+   "SRC": "SI57X_CLK",
+   "EN": true
+  },
+  "FP2_CLK2": {
+   "SRC": "FCLKA",
+   "EN": false
+  },
+  "LINK01_CLK": {
+   "SRC": "WR_PLL_CLK1",
+   "EN": true
+  },
+  "FP2_CLK1": {
+   "SRC": "FCLKA",
+   "EN": false
+  },
+  "PCIE_CLK1": {
+   "SRC": "FCLKA",
+   "EN": true
+  },
+  "LINK23_CLK": {
+   "SRC": "WR_PLL_CLK1",
+   "EN": false
+  },
+  "FIN1_CLK3": {
+   "SRC": "CLK20_VCXO",
+   "EN": false
+  },
+  "FIN1_CLK2": {
+   "SRC": "CLK20_VCXO",
+   "EN": false
+  },
+  "RTM_SYNC_CLK": {
+   "SRC": "CLK20_VCXO",
+   "EN": false
+  },
+  "OP15C": {
+   "SRC": "SI57X_CLK",
+   "EN": true
+  },
+  "FIN2_CLK2": {
+   "SRC": "CLK20_VCXO",
+   "EN": false
+  },
+  "FIN2_CLK3": {
+   "SRC": "FMC2_CLK2_BIDIR",
+   "EN": false
+  }
+ }
+}