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Remove old Verilog wb_orbit_intlk testbench
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augustofg committed Sep 20, 2024
1 parent 6ad15b1 commit 8013818
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32 changes: 0 additions & 32 deletions hdl/testbench/orbit_intlk/modelsim/Manifest.py

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42 changes: 0 additions & 42 deletions hdl/testbench/orbit_intlk/modelsim/clk_rst.v

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24 changes: 0 additions & 24 deletions hdl/testbench/orbit_intlk/modelsim/defines.v

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25 changes: 0 additions & 25 deletions hdl/testbench/orbit_intlk/modelsim/run.do

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4 changes: 0 additions & 4 deletions hdl/testbench/orbit_intlk/modelsim/timescale.v

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