AMDGPU: Handle gfx950 change in mfma_f64_16x16x4 + valu hazard #117262
+28
−10
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
This was referenced Nov 21, 2024
arsenm
requested review from
jayfoad,
pravinjagtap,
rampitec,
shiltian,
Sisyph and
srpande
|
@llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) ChangesIncrease from 11 wait states to 19 Full diff: https://github.com/llvm/llvm-project/pull/117262.diff 2 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
index 44afccb0690d0d..99a176731599cc 100644
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
@@ -2603,6 +2603,7 @@ int GCNHazardRecognizer::checkMAIVALUHazards(MachineInstr *MI) {
const int DMFMA16x16WriteVgprMemExpReadWaitStates = 18;
const int DMFMA4x4WriteVgprVALUReadWaitStates = 6;
const int DMFMA16x16WriteVgprVALUReadWaitStates = 11;
+ const int GFX950_DMFMA16x16WriteVgprVALUReadWaitStates = 19;
const int DotWriteSameDotReadSrcAB = 3;
const int DotWriteDifferentVALURead = 3;
const int DMFMABetweenVALUWriteVMEMRead = 2;
@@ -2663,9 +2664,12 @@ int GCNHazardRecognizer::checkMAIVALUHazards(MachineInstr *MI) {
break;
case 8:
case 16:
- NeedWaitStates = IsMemOrExport
- ? DMFMA16x16WriteVgprMemExpReadWaitStates
- : DMFMA16x16WriteVgprVALUReadWaitStates;
+ NeedWaitStates =
+ IsMemOrExport
+ ? DMFMA16x16WriteVgprMemExpReadWaitStates
+ : (ST.hasGFX950Insts()
+ ? GFX950_DMFMA16x16WriteVgprVALUReadWaitStates
+ : DMFMA16x16WriteVgprVALUReadWaitStates);
break;
default:
llvm_unreachable("unexpected dgemm");
diff --git a/llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir b/llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
index 9681b01f334f9a..d2b2f226404da8 100644
--- a/llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
+++ b/llvm/test/CodeGen/AMDGPU/mai-hazards-gfx940.mir
@@ -1,4 +1,5 @@
-# RUN: llc -mtriple=amdgcn -mcpu=gfx940 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefix=GCN %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx940 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefixes=GCN,GFX940 %s
+# RUN: llc -mtriple=amdgcn -mcpu=gfx950 -verify-machineinstrs -run-pass post-RA-hazard-rec %s -o - | FileCheck -check-prefixes=GCN,GFX950 %s
# GCN-LABEL: name: valu_write_vgpr_sgemm_mfma_read
# GCN: V_MOV_B32
@@ -803,8 +804,12 @@ body: |
...
# GCN-LABEL: name: dmfma16x16_write_vgpr_valu_read
# GCN: V_MFMA
-# GCN-NEXT: S_NOP 7
-# GCN-NEXT: S_NOP 2
+# GFX940-NEXT: S_NOP 7
+# GFX940-NEXT: S_NOP 2
+
+# GFX950-NEXT: S_NOP 7
+# GFX950-NEXT: S_NOP 7
+# GFX950-NEXT: S_NOP 2
# GCN-NEXT: V_MOV_B32
name: dmfma16x16_write_vgpr_valu_read
body: |
@@ -867,8 +872,13 @@ body: |
...
# GCN-LABEL: name: dmfma16x16_write_vgpr_dot_read
# GCN: V_MFMA
-# GCN-NEXT: S_NOP 7
-# GCN-NEXT: S_NOP 2
+# GFX940-NEXT: S_NOP 7
+# GFX940-NEXT: S_NOP 2
+
+# GFX950-NEXT: S_NOP 7
+# GFX950-NEXT: S_NOP 7
+# GFX950-NEXT: S_NOP 2
+
# GCN-NEXT: V_DOT
name: dmfma16x16_write_vgpr_dot_read
body: |
@@ -1505,8 +1515,12 @@ body: |
...
# GCN-LABEL: name: dmfma16x16_write_agpr_valu_read
# GCN: V_MFMA
-# GCN-NEXT: S_NOP 7
-# GCN-NEXT: S_NOP 2
+# GFX940-NEXT: S_NOP 7
+# GFX940-NEXT: S_NOP 2
+
+# GFX950-NEXT: S_NOP 7
+# GFX950-NEXT: S_NOP 7
+# GFX950-NEXT: S_NOP 2
# GCN-NEXT: V_ACCVGPR_READ_B32_e64
name: dmfma16x16_write_agpr_valu_read
body: |
|
arsenm
force-pushed
the
users/arsenm/gfx950/sched-model
branch
from
0181a18
to
d203e5d
Compare
arsenm
force-pushed
the
users/arsenm/gfx950/mfma_f64_16x16x4_valu_hazard
branch
from
c055db0
to
fc9424b
Compare
arsenm
force-pushed
the
users/arsenm/gfx950/sched-model
branch
from
d203e5d
to
260e455
Compare
arsenm
force-pushed
the
users/arsenm/gfx950/mfma_f64_16x16x4_valu_hazard
branch
from
fc9424b
to
0641257
Compare
This was referenced Nov 22, 2024
Merged
arsenm
force-pushed
the
users/arsenm/gfx950/sched-model
branch
from
260e455
to
308cbbb
Compare
arsenm
force-pushed
the
users/arsenm/gfx950/mfma_f64_16x16x4_valu_hazard
branch
from
0641257
to
0f57e4c
Compare
arsenm
force-pushed
the
users/arsenm/gfx950/sched-model
branch
from
308cbbb
to
6863958
Compare
arsenm
force-pushed
the
users/arsenm/gfx950/mfma_f64_16x16x4_valu_hazard
branch
from
0f57e4c
to
a444594
Compare
This was referenced Nov 22, 2024
shiltian
approved these changes
Nov 23, 2024
arsenm
force-pushed
the
users/arsenm/gfx950/sched-model
branch
from
6863958
to
5e2a2ec
Compare
Increase from 11 wait states to 19
arsenm
force-pushed
the
users/arsenm/gfx950/mfma_f64_16x16x4_valu_hazard
branch
from
a444594
to
979aa0b
Compare
This was referenced Nov 23, 2024
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Increase from 11 wait states to 19