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ASoC: starfive: Add StarFive JH7100 audio drivers
Signed-off-by: Michael Yan <[email protected]> Signed-off-by: Jenny Zhang <[email protected]> Signed-off-by: Walker Chen <[email protected]> Signed-off-by: Emil Renner Berthing <[email protected]>
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# SPDX-License-Identifier: GPL-2.0 | ||
# Copyright (C) 2021 StarFive Technology Co., Ltd. | ||
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config SND_STARFIVE_SPDIF | ||
tristate "starfive spdif" | ||
select SND_SOC_GENERIC_DMAENGINE_PCM | ||
select REGMAP_MMIO | ||
help | ||
Say Y or M if you want to add support for codecs attached to the | ||
I2S interface on VIC vic_starlight board. You will also need to select | ||
the drivers for the rest of VIC audio subsystem. | ||
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config SND_STARFIVE_SPDIF_PCM | ||
bool "PCM PIO extension for spdif driver" | ||
depends on SND_STARFIVE_SPDIF | ||
help | ||
Say Y or N if you want to add a custom ALSA extension that registers | ||
a PCM and uses PIO to transfer data. | ||
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config SND_STARFIVE_PWMDAC | ||
tristate "starfive pwmdac Device Driver" | ||
select SND_SOC_GENERIC_DMAENGINE_PCM | ||
help | ||
Say Y or M if you want to add support for sf pwmdac driver. | ||
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config SND_STARFIVE_PWMDAC_PCM | ||
bool "PCM PIO extension for pwmdac driver" | ||
depends on SND_STARFIVE_PWMDAC | ||
help | ||
Say Y or N if you want to add a custom ALSA extension that registers | ||
a PCM and uses PIO to transfer data. | ||
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config SND_STARFIVE_PDM | ||
tristate "starfive pdm Device Driver" | ||
select REGMAP_MMIO | ||
help | ||
Say Y or M if you want to add support for sf pdm driver. | ||
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config SND_STARFIVE_I2SVAD | ||
tristate "starfive I2SVAD Device Driver" | ||
select SND_SOC_GENERIC_DMAENGINE_PCM | ||
help | ||
Say Y or M if you want to add support for I2SVAD driver for | ||
starfive I2SVAD device. | ||
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config SND_STARFIVE_I2SVAD_PCM | ||
bool "PCM PIO extension for I2SVAD driver" | ||
depends on SND_STARFIVE_I2SVAD | ||
help | ||
Say Y or N if you want to add a custom ALSA extension that registers | ||
a PCM and uses PIO to transfer data. | ||
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This functionality is specially suited for I2SVAD devices that don't have | ||
DMA support. | ||
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# SPDX-License-Identifier: GPL-2.0 | ||
# | ||
# Copyright (C) 2021 StarFive Technology Co., Ltd. | ||
# | ||
obj-$(CONFIG_SND_STARFIVE_SPDIF) += spdif.o | ||
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spdif-y := starfive_spdif.o | ||
spdif-$(CONFIG_SND_STARFIVE_SPDIF_PCM) += starfive_spdif_pcm.o | ||
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obj-$(CONFIG_SND_STARFIVE_PWMDAC) += pwmdac.o | ||
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pwmdac-y := starfive_pwmdac.o starfive_pwmdac_transmitter.o | ||
pwmdac-$(CONFIG_SND_STARFIVE_PWMDAC_PCM) += starfive_pwmdac_pcm.o | ||
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obj-$(CONFIG_SND_STARFIVE_PDM) += starfive_pdm.o | ||
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obj-$(CONFIG_SND_STARFIVE_I2SVAD) += i2svad.o | ||
i2svad-y := starfive_i2svad.o | ||
i2svad-$(CONFIG_SND_STARFIVE_I2SVAD_PCM) += starfive_i2svad_pcm.o |
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// SPDX-License-Identifier: GPL-2.0 | ||
/* | ||
* Copyright (C) 2021 StarFive Technology Co., Ltd. | ||
*/ | ||
#ifndef __STARFIVE_PWMDAC_LOCAL_H | ||
#define __STARFIVE_PWMDAC_LOCAL_H | ||
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#include <linux/clk.h> | ||
#include <linux/reset.h> | ||
#include <linux/device.h> | ||
#include <linux/types.h> | ||
#include <sound/dmaengine_pcm.h> | ||
#include <sound/pcm.h> | ||
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#define PWMDAC_WDATA 0 ///PWMDAC_BASE_ADDR | ||
#define PWMDAC_CTRL 0x04 ///PWMDAC_BASE_ADDR + 0x04 | ||
#define PWMDAC_SATAE 0x08 ///PWMDAC_BASE_ADDR + 0x08 | ||
#define PWMDAC_RESERVED 0x0C ///PWMDAC_BASE_ADDR + 0x0C | ||
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#define SFC_PWMDAC_SHIFT BIT(1) | ||
#define SFC_PWMDAC_DUTY_CYCLE BIT(2) | ||
#define SFC_PWMDAC_CNT_N BIT(4) | ||
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#define SFC_PWMDAC_LEFT_RIGHT_DATA_CHANGE BIT(13) | ||
#define SFC_PWMDAC_DATA_MODE BIT(14) | ||
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#define FIFO_UN_FULL 0 | ||
#define FIFO_FULL 1 | ||
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enum pwmdac_lr_change{ | ||
NO_CHANGE = 0, | ||
CHANGE, | ||
}; | ||
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enum pwmdac_d_mode{ | ||
UNSINGED_DATA = 0, | ||
INVERTER_DATA_MSB, | ||
}; | ||
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enum pwmdac_shift_bit{ | ||
PWMDAC_SHIFT_8 = 8, /*pwmdac shift 8 bit*/ | ||
PWMDAC_SHIFT_10 = 10, /*pwmdac shift 10 bit*/ | ||
}; | ||
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enum pwmdac_duty_cycle{ | ||
PWMDAC_CYCLE_LEFT = 0, /*pwmdac duty cycle left*/ | ||
PWMDAC_CYCLE_RIGHT = 1, /*pwmdac duty cycle right*/ | ||
PWMDAC_CYCLE_CENTER = 2, /*pwmdac duty cycle center*/ | ||
}; | ||
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/*sample count [12:4] <511*/ | ||
enum pwmdac_sample_count{ | ||
PWMDAC_SAMPLE_CNT_1 = 1, | ||
PWMDAC_SAMPLE_CNT_2, | ||
PWMDAC_SAMPLE_CNT_3, | ||
PWMDAC_SAMPLE_CNT_4, | ||
PWMDAC_SAMPLE_CNT_5, | ||
PWMDAC_SAMPLE_CNT_6, | ||
PWMDAC_SAMPLE_CNT_7, | ||
PWMDAC_SAMPLE_CNT_8 = 1, //(32.468/8) == (12.288/3) == 4.096 | ||
PWMDAC_SAMPLE_CNT_9, | ||
PWMDAC_SAMPLE_CNT_10, | ||
PWMDAC_SAMPLE_CNT_11, | ||
PWMDAC_SAMPLE_CNT_12, | ||
PWMDAC_SAMPLE_CNT_13, | ||
PWMDAC_SAMPLE_CNT_14, | ||
PWMDAC_SAMPLE_CNT_15, | ||
PWMDAC_SAMPLE_CNT_16, | ||
PWMDAC_SAMPLE_CNT_17, | ||
PWMDAC_SAMPLE_CNT_18, | ||
PWMDAC_SAMPLE_CNT_19, | ||
PWMDAC_SAMPLE_CNT_20 = 20, | ||
PWMDAC_SAMPLE_CNT_30 = 30, | ||
PWMDAC_SAMPLE_CNT_511 = 511, | ||
}; | ||
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enum data_shift{ | ||
PWMDAC_DATA_LEFT_SHIFT_BIT_0 = 0, | ||
PWMDAC_DATA_LEFT_SHIFT_BIT_1, | ||
PWMDAC_DATA_LEFT_SHIFT_BIT_2, | ||
PWMDAC_DATA_LEFT_SHIFT_BIT_3, | ||
PWMDAC_DATA_LEFT_SHIFT_BIT_4, | ||
PWMDAC_DATA_LEFT_SHIFT_BIT_5, | ||
PWMDAC_DATA_LEFT_SHIFT_BIT_6, | ||
PWMDAC_DATA_LEFT_SHIFT_BIT_7, | ||
PWMDAC_DATA_LEFT_SHIFT_BIT_ALL, | ||
}; | ||
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enum pwmdac_config_list{ | ||
shift_8Bit_unsigned = 0, | ||
shift_8Bit_unsigned_dataShift, | ||
shift_10Bit_unsigned, | ||
shift_10Bit_unsigned_dataShift, | ||
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shift_8Bit_inverter, | ||
shift_8Bit_inverter_dataShift, | ||
shift_10Bit_inverter, | ||
shift_10Bit_inverter_dataShift, | ||
}; | ||
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struct sf_pwmdac_dev { | ||
void __iomem *pwmdac_base; | ||
resource_size_t mapbase; | ||
u8 mode; | ||
u8 shift_bit; | ||
u8 duty_cycle; | ||
u8 datan; | ||
u8 data_mode; | ||
u8 lr_change; | ||
u8 shift; | ||
u8 fifo_th; | ||
bool use_pio; | ||
spinlock_t lock; | ||
int active; | ||
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struct clk *clk_audio_root; | ||
struct clk *clk_audio_src; | ||
struct clk *clk_audio_12288; | ||
struct clk *clk_dma1p_ahb; | ||
struct clk *clk_pwmdac_apb; | ||
struct clk *clk_dac_mclk; | ||
struct reset_control *rst_apb_bus; | ||
struct reset_control *rst_dma1p_ahb; | ||
struct reset_control *rst_apb_pwmdac; | ||
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struct device *dev; | ||
struct snd_dmaengine_dai_dma_data play_dma_data; | ||
struct snd_pcm_substream __rcu *tx_substream; | ||
unsigned int (*tx_fn)(struct sf_pwmdac_dev *dev, | ||
struct snd_pcm_runtime *runtime, unsigned int tx_ptr, | ||
bool *period_elapsed); | ||
unsigned int tx_ptr; | ||
struct task_struct *tx_thread; | ||
bool tx_thread_exit; | ||
}; | ||
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#if IS_ENABLED(CONFIG_SND_STARFIVE_PWMDAC_PCM) | ||
void sf_pwmdac_pcm_push_tx(struct sf_pwmdac_dev *dev); | ||
void sf_pwmdac_pcm_pop_rx(struct sf_pwmdac_dev *dev); | ||
int sf_pwmdac_pcm_register(struct platform_device *pdev); | ||
#else | ||
void sf_pwmdac_pcm_push_tx(struct sf_pwmdac_dev *dev) { } | ||
void sf_pwmdac_pcm_pop_rx(struct sf_pwmdac_dev *dev) { } | ||
int sf_pwmdac_pcm_register(struct platform_device *pdev) | ||
{ | ||
return -EINVAL; | ||
} | ||
#endif | ||
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#endif |
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