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[opentitantool] Make TPM driver take advantage of new primitives #6

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[opentitantool] Make TPM driver take advantage of new primitives

[opentitantool] Make TPM driver take advantage of new primitives #6

Triggered via push November 19, 2024 23:58
@jesultrajesultra
pushed 2d71bed
tpm_poll
Status Failure
Total duration 1m 31s
Artifacts –

ci.yml

on: push
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Earl Grey for CW310  /  Build bitstream
Earl Grey for CW310 / Build bitstream
Earl Grey for CW340  /  Build bitstream
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310 Hyperdebug  /  Build bitstream
Earl Grey for CW310 Hyperdebug / Build bitstream
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0s
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Airgapped build
0s
Airgapped build
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Verible lint
Verilated English Breakfast
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Verilated English Breakfast
CW305's Bitstream
0s
CW305's Bitstream
Build Docker Containers
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Build Docker Containers
Build and test software
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Build and test software
CW310 ROM Tests  /  FPGA test
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
CW310 ROM_EXT Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
CW310 Test ROM Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
CW340 Manufacturing Tests / FPGA test
CW340 ROM Tests  /  FPGA test
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
CW340 SiVal Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
CW340 Test ROM Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
CW310 Manufacturing Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
CW310 SiVal Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
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26s
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3 errors
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google-github-actions/auth failed with: the GitHub Action workflow must specify exactly one of "workload_identity_provider" or "credentials_json"! If you are specifying input values via GitHub secrets, ensure the secret is being injected into the environment. By default, secrets are not passed to workflows triggered from forks, including Dependabot.
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Process completed with exit code 1.
Verify FPGA jobs
Process completed with exit code 1.