Chisel implementation of a CORDIC, supports vector and rotation mode in circular domain
Cordicio is a Chisel implementation of a CORDIC.
It currently supports rotation and vectoring mode in circular domain and works on any quadrant.
Using as a FuseSoC core:
Add the FuseSoC generator library to get the chisel generator
$ fusesoc library add fusesoc-generators-lib https://github.com/fusesoc/fusesoc-generators
Add the Cordicio repo as a library to access the core
$ fusesoc library add cordicio-lib https://github.com/ivanvig/cordicio
Use it in your own core by declaring ivanvig:math:cordicio
as a
dependency.
The FuseSoC chisel generator will automatically generate the Verilog source code from the chisel sources
The Verilog source code can also be generated by running
$ sbt run
See the doc here