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Add citation link in README #29

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7 changes: 7 additions & 0 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -23,6 +23,7 @@ Read more detailed Chinese README: [中文说明](README.zh-CN.md).
- [TLB](#tlb)
- [Memory Access](#memory-access)
- [Verification Example](#verification-example)
- [Publications](#publications)

## Usage

Expand Down Expand Up @@ -129,3 +130,9 @@ when(backend.io.dmem.resp.fire) {
In this example of processor design, we modified the code to get a verifiable
system with reference model.
And then perform formal verification using BMC through ChiselTest.

## Publications

If our work has been helpful to you, please cite:

**SETTA 2024: Formal Verification of RISC-V Processor Chisel Designs** [Link](https://link.springer.com/chapter/10.1007/978-981-96-0602-3_8) | [BibTex](https://citation-needed.springer.com/v2/references/10.1007/978-981-96-0602-3_8?format=bibtex&flavour=citation)
7 changes: 7 additions & 0 deletions README.zh-CN.md
Original file line number Diff line number Diff line change
Expand Up @@ -26,6 +26,7 @@
- [使用建议](#使用建议)
- [使用 GitHub Actions 进行验证](#使用-github-actions-进行验证)
- [验证实例](#验证实例)
- [出版物](#出版物)

## 安装

Expand Down Expand Up @@ -345,3 +346,9 @@ GitHub Actions 可以在每次 push 代码到 GitHub 的时候自动运行验证
该项目是在 [NutShell](https://github.com/OSCPU/NutShell) 上进行验证的例子。
我们修改了 NutShell 代码以获取验证所需的处理器信息,并与参考模型进行了同步。
最终通过 [ChiselTest](https://github.com/ucb-bar/chiseltest) 提供的接口调用了 BMC 算法进行验证。

## 出版物

如果我们的工作对您有帮助,请引用:

**SETTA 2024: Formal Verification of RISC-V Processor Chisel Designs** [Link](https://link.springer.com/chapter/10.1007/978-981-96-0602-3_8) | [BibTex](https://citation-needed.springer.com/v2/references/10.1007/978-981-96-0602-3_8?format=bibtex&flavour=citation)
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