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Merge OpenAI Triton commit 6f5baf6
#2990
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This PR refactors the instruction scheduling enums. Now, it is implemented in the MLIR.
This PR implements a specialized codegen for `tt.gather` when it satisfies the conditions of being "warp local": it is possible to compute the output tensor without data movement across warps. `isWarpLocal` is a new function that checks this condition, and places additional restrictions to simplify codegen / separate concerns from `ttg.convert_layout`. This enables `tt.gather` to generate better code when the layout is suitable. In a subsequent PR, a special pattern will be added to generate optimized layouts for `tt.gather` when possible/profitable to enable the lowering.
### Commits in this PR 1. [Pipeliner] Multi-buffer TMA descriptors 2. Add tests for pipelined descriptor creation 3. Be more conservative about number of TMA buffers to allocate 4. Update golden samples 5. Use correct modulus for tma updates
@lezcano pointed out in another PR that the order is confusing because typically we list the lane ID, warp ID, and blockID in this order.
The AMD runner persists changes to the file system between jobs, so the caches need to be manually cleaned up. Closes #5384
This relands triton-lang/triton#5392 to enable new arch target since backend support has been added--it doesn't depend on the reverted LLVM upgrade in triton-lang/triton#5341; basic necessary enablement is already included in the current llvm version we're using.
Enable the TRITON_KERNEL_OVERRIDE feature to work on AMD assembly and binary. Currently, for the backends, it only works on Nvidia `ptx` and `cubin`. --------- Co-authored-by: Yuanwei Fang <[email protected]>
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Merge OpenAI Triton commit
Merge OpenAI Triton commit Dec 11, 2024
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This PR change the Triton base from 4d2e9e5 to 6f5baf6 (Dec 10).
Pass rate: 99.82%->99.81% (#2991)
Please do not squash and merge this PR.