Decompose large simdblockwrite to smaller simdblockwrites

[whitneywhtsang]

Similar to #2193, but for simdblockwrite.
Decompose simdblockwrite of vector size > 8 to a number of simdblockwrites of vector size 8.
e.g., <64xi16> simdblockwrite is not supported by OpenCL C builtins, decompose it to 8 x <8xi16>.
Restrict TritonGEN::SIMDBlockWriteOp to only accept vector types that are allowed by OpenCL C builtins.

[whitneywhtsang]

CIs:

• baseline + TRITON_INTEL_ENABLE_FIRST_LOAD_TO_SLM: https://github.com/intel/intel-xpu-backend-for-triton/actions/runs/10842442552
• This PR + TRITON_INTEL_ENABLE_FIRST_LOAD_TO_SLM: https://github.com/intel/intel-xpu-backend-for-triton/actions/runs/10842020746
• baseline + TRITON_INTEL_REDUCE_TRANSPOSE: https://github.com/intel/intel-xpu-backend-for-triton/actions/runs/10842216751
• This PR + TRITON_INTEL_REDUCE_TRANSPOSE: https://github.com/intel/intel-xpu-backend-for-triton/actions/runs/10842128423

=> Results within the margin of error.

[victor-eds]

Looks good! Just a minor NIT