Merge commit '0bd30a2f3192204c5a50d5ffde27ad8493f6c026'

intel · Nov 19, 2024 · 3b53ca9 · 3b53ca9
2 parents b7647ac + 0bd30a2
commit 3b53ca9
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Showing 2 changed files with 2 additions and 2 deletions.
diff --git a/cmake/llvm-hash.txt b/cmake/llvm-hash.txt
@@ -1 +1 @@
-fa57c7a6a5f594a9e3ae2dbe3542cf89a20cdd73
+bd9145c8c21334e099d51b3e66f49d51d24931ee
diff --git a/third_party/intel/lib/TritonIntelGPUToLLVM/LoadStoreOpToLLVM.cpp b/third_party/intel/lib/TritonIntelGPUToLLVM/LoadStoreOpToLLVM.cpp
@@ -1571,7 +1571,7 @@ struct AtomicRMWOpConversion
     auto lowPtrBits = and_(intPtr, i64_val(3));
     auto elemIndex = trunc(i32_ty, lshr(lowPtrBits, i64_val(1)));
     auto alignPtr = inttoptr(rmwPtr.getType(), sub(intPtr, lowPtrBits));
-    auto firstValInt = load(i32_ty, alignPtr, 4, false, false, false,
+    auto firstValInt = load(i32_ty, alignPtr, 4, false, false, false, false,
                             LLVM::AtomicOrdering::acquire);
 
     // Create a loop body block. It has a single parameter which holds the
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		fa57c7a6a5f594a9e3ae2dbe3542cf89a20cdd73
		bd9145c8c21334e099d51b3e66f49d51d24931ee