Fix runtime error from split barrier (#1708)

Before this PR, when enabling split barrier, `RuntimeError: Triton Error
[ZE]: 0x78000018`.

This PR changes device library module metadata from
```
!spirv.Source = !{!1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1}
!1 = !{i32 4, i32 100000}
```
to
```
!spirv.Source = !{!1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1, !1}
!1 = !{i32 3, i32 100000}
```
Note:
`4` in `!spirv.Source = !{!1} !1 = !{i32 4, i32 100000}` corresponds to
OpenCL C++,
so OpenCL C builtins e.g., `_Z29intel_work_group_barrier_waitii` is not
translated to SPIRV builtins,
which causes IGC to not recognize the split barrier builtins and not
lowered them to GenISA.
`3` in `!spirv.Source = !{!1} !1 = !{i32 3, i32 100000}` corresponds to
OpenCL C.

---------

Signed-off-by: Whitney Tsang <[email protected]>