Some fixes & cleanup.

Add UART Hardware mode & I2C bit-banging mode. Tested with success(with logic analyzer) SPI, UART & I2C.
hydrabus · Oct 31, 2014 · a1c311e · a1c311e
1 parent 3fbaa71
commit a1c311e
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Showing 20 changed files with 924 additions and 40 deletions.
diff --git a/common/mode_config.h b/common/mode_config.h
@@ -50,12 +50,13 @@ typedef struct
   long dev_parity; /* For UART */
   long dev_stop_bit; /* For UART */
 
-  uint32_t : 25; // not used reserved for future use
+  uint32_t : 24; // not used reserved for future use
   uint32_t altAUX : 2; // 4 AUX tbd
   uint32_t periodicService : 1;
   uint32_t lsbEN : 1;
   uint32_t HiZ : 1;
   uint32_t int16 : 1; // 16 bits output?
+  uint32_t ack_pending : 1; // I2C Read Ack pending
   uint32_t wwr : 1; // write with read
 
   uint8_t buffer_tx[256];

diff --git a/drv/stm32cube/bsp.c b/drv/stm32cube/bsp.c
@@ -13,11 +13,36 @@
     See the License for the specific language governing permissions and
     limitations under the License.
 */
+#include "bsp.h"
 #include "stm32f405xx.h"
 #include "stm32f4xx_hal.h"
 
 static uint32_t uwTick = 0;
 
+/* Internal Cycle Counter */
+#if !defined(IOREG32) || defined(__DOXYGEN__)
+  typedef volatile uint32_t IOREG32;
+#endif
+
+#if !defined(CMx_DWT) || defined(__DOXYGEN__)
+  typedef struct
+  {
+    IOREG32       CTRL;
+    IOREG32       CYCCNT;
+  } CMx_DWT;
+  #define DWTBase                 ((CMx_DWT *)0xE0001000U)
+  #define DWT_CTRL                (DWTBase->CTRL)
+  #define DWT_CTRL_CYCCNTENA      (0x1U << 0)
+#endif
+
+#if !defined(clear_cyclecounter) || defined(__DOXYGEN__)
+  #define clear_cyclecounter() ( DWTBase->CYCCNT = 0 )
+#endif
+
+#if !defined(get_cyclecounter) || defined(__DOXYGEN__)
+  #define get_cyclecounter() ( DWTBase->CYCCNT )
+#endif
+
 void HAL_IncTick(void)
 {
   uwTick++;
@@ -28,3 +53,49 @@ uint32_t HAL_GetTick(void)
   HAL_IncTick();
   return uwTick;
 }
+
+uint32_t HAL_RCC_GetPCLK1Freq(void)
+{
+  return 42000000;
+}
+
+uint32_t HAL_RCC_GetPCLK2Freq(void)
+{
+  return 84000000;
+}
+
+bool delay_is_expired(bool start, uint32_t wait_nb_cycles)
+{
+  if(start == TRUE)
+  {
+    /* Disable IRQ globally */
+    __asm__("cpsid i");
+    clear_cyclecounter();
+  }else
+  {
+    /* Minus 10 cycles to take into account code overhead */
+    if(get_cyclecounter() >= (wait_nb_cycles-10))
+    {
+      /* Enable IRQ globally */
+      __asm__("cpsie i");
+      return TRUE;
+    }
+  }
+  return FALSE;
+}
+
+void wait_delay(uint32_t wait_nb_cycles)
+{
+  /* Disable IRQ globally */
+  __asm__("cpsid i");
+
+  clear_cyclecounter();
+  /* Minus 10 cycles to take into account code overhead */
+  while(get_cyclecounter() < (wait_nb_cycles-10))
+  {
+    __asm__("nop");
+  }
+
+  /* Enable IRQ globally */
+  __asm__("cpsie i");
+}
diff --git a/drv/stm32cube/bsp.h b/drv/stm32cube/bsp.h
@@ -16,6 +16,25 @@
 #ifndef _BSP_H_
 #define _BSP_H_
 
+#include <stdint.h>
+
+/* UBTN PA0 Configured as Input */
+#undef USER_BUTTON
+#define USER_BUTTON (palReadPad(GPIOA, 0))
+
+/* Macro for fast read, set & clear GPIO pin */
+#define gpio_get_pin(GPIOx, GPIO_Pin) (GPIOx->IDR & GPIO_Pin)
+#define gpio_set_pin(GPIOx, GPIO_Pin) (GPIOx->BSRRH = GPIO_Pin)
+#define gpio_clr_pin(GPIOx, GPIO_Pin) (GPIOx->BSRRL = GPIO_Pin)
+
+#if !defined(bool) || defined(__DOXYGEN__)
+typedef enum 
+{
+  FALSE = 0,
+  TRUE = (!FALSE)
+} bool;
+#endif
+
 /* Same definition as HAL_StatusTypeDef,
    used as abstraction layer to avoid dependencies with stm32f4xx_hal_def.h
 */
@@ -27,4 +46,10 @@ typedef enum
   BSP_TIMEOUT = 0x03
 } bsp_status_t;
 
+/* wait_nb_cycles shall be min 10 */
+bool delay_is_expired(bool start, uint32_t wait_nb_cycles);
+
+/* wait_nb_cycles shall be min 10 */
+void wait_delay(uint32_t wait_nb_cycles);
+
 #endif /* _BSP_H_ */