riscv: andes_plic: Fix riscv_get_ipi() mask

Current logic in riscv_get_ipi() for Andes PLICSW does not look correct. The mask to test IPI pending bits for a hart should be left shifted by (8 * gd->arch.boot_hart), just the same as what is done in riscv_send_ipi(). Fixes: 8b3e97b ("riscv: add functions for reading the IPI status") Signed-off-by: Bin Meng <[email protected]> Reviewed-by: Rick Chen <[email protected]> Tested-by: Rick Chen <[email protected]>
hailo-ai · Jun 17, 2021 · 62ce0a0 · 62ce0a0
1 parent 279de75
commit 62ce0a0
Showing 1 changed file with 3 additions and 1 deletion.
diff --git a/arch/riscv/lib/andes_plic.c b/arch/riscv/lib/andes_plic.c
@@ -105,9 +105,11 @@ int riscv_clear_ipi(int hart)
 
 int riscv_get_ipi(int hart, int *pending)
 {
+	unsigned int ipi = (SEND_IPI_TO_HART(hart) << (8 * gd->arch.boot_hart));
+
 	*pending = readl((void __iomem *)PENDING_REG(gd->arch.plic,
 						     gd->arch.boot_hart));
-	*pending = !!(*pending & SEND_IPI_TO_HART(hart));
+	*pending = !!(*pending & ipi);
 
 	return 0;
 }