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- Fix parsing of "mtrr list" command
- Introduce USE_EARLY_BOARD_INIT option and remove dead codes for most
  x86 boards
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trini committed Sep 1, 2020
2 parents 23e333a + 1150a0b commit 502f048
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Showing 37 changed files with 26 additions and 145 deletions.
3 changes: 3 additions & 0 deletions arch/x86/Kconfig
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Expand Up @@ -203,6 +203,9 @@ config SPL_X86_32BIT_INIT
help
This is enabled when 32-bit init is in SPL

config USE_EARLY_BOARD_INIT
bool

config RESET_SEG_START
hex
depends on X86_RESET_VECTOR
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3 changes: 3 additions & 0 deletions arch/x86/cpu/start.S
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Expand Up @@ -88,6 +88,7 @@ _start:
/* Clear the interrupt vectors */
lidt blank_idt_ptr

#ifdef CONFIG_USE_EARLY_BOARD_INIT
/*
* Critical early platform init - generally not used, we prefer init
* to happen later when we have a console, in case something goes
Expand All @@ -96,6 +97,8 @@ _start:
jmp early_board_init
.globl early_board_init_ret
early_board_init_ret:
#endif

post_code(POST_START)

/* Initialise Cache-As-RAM */
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8 changes: 0 additions & 8 deletions arch/x86/include/asm/acpi_nhlt.h
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Expand Up @@ -137,14 +137,6 @@ int nhlt_endpoint_add_formats(struct nhlt_endpoint *endpoint,
*/
void nhlt_next_instance(struct nhlt *nhlt, int link_type);

/*
* Serialize NHLT object to ACPI table. Take in the beginning address of where
* the table will reside and return the address of the next ACPI table. On
* error 0 will be returned. The NHLT object is no longer valid after this
* function is called.
*/
uintptr_t nhlt_serialise(struct nhlt *nhlt, uintptr_t acpi_addr);

/*
* Serialize NHLT object to ACPI table. Take in the beginning address of where
* the table will reside oem_id and oem_table_id and return the address of the
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2 changes: 1 addition & 1 deletion board/advantech/som-db5800-som-6867/Makefile
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Expand Up @@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc

obj-y += som-db5800-som-6867.o start.o
obj-y += som-db5800-som-6867.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
8 changes: 0 additions & 8 deletions board/advantech/som-db5800-som-6867/start.S

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2 changes: 1 addition & 1 deletion board/congatec/conga-qeval20-qa3-e3845/Makefile
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Expand Up @@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc

obj-y += conga-qeval20-qa3.o start.o
obj-y += conga-qeval20-qa3.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
8 changes: 0 additions & 8 deletions board/congatec/conga-qeval20-qa3-e3845/start.S

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2 changes: 1 addition & 1 deletion board/coreboot/coreboot/Makefile
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Expand Up @@ -10,4 +10,4 @@
# (C) Copyright 2002
# Daniel Engström, Omicron Ceti AB, [email protected].

obj-y += start.o coreboot.o
obj-y += coreboot.o
12 changes: 0 additions & 12 deletions board/coreboot/coreboot/start.S

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2 changes: 1 addition & 1 deletion board/dfi/dfi-bt700/Makefile
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Expand Up @@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc

obj-y += dfi-bt700.o start.o
obj-y += dfi-bt700.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
8 changes: 0 additions & 8 deletions board/dfi/dfi-bt700/start.S

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2 changes: 1 addition & 1 deletion board/efi/efi-x86_payload/Makefile
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Expand Up @@ -2,4 +2,4 @@
#
# Copyright (C) 2018, Bin Meng <[email protected]>

obj-y += start.o payload.o
obj-y += payload.o
8 changes: 0 additions & 8 deletions board/efi/efi-x86_payload/start.S

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2 changes: 1 addition & 1 deletion board/emulation/qemu-x86/Makefile
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Expand Up @@ -2,4 +2,4 @@
#
# Copyright (C) 2015, Bin Meng <[email protected]>

obj-y += start.o
obj-y += qemu-x86.o
Empty file.
8 changes: 0 additions & 8 deletions board/emulation/qemu-x86/start.S

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1 change: 1 addition & 0 deletions board/google/chromebook_coral/Kconfig
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Expand Up @@ -18,6 +18,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select USE_EARLY_BOARD_INIT
select INTEL_APOLLOLAKE
select BOARD_ROMSIZE_KB_16384

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1 change: 1 addition & 0 deletions board/google/chromebook_link/Kconfig
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Expand Up @@ -19,6 +19,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select USE_EARLY_BOARD_INIT
select NORTHBRIDGE_INTEL_IVYBRIDGE
select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192
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1 change: 1 addition & 0 deletions board/google/chromebook_samus/Kconfig
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Expand Up @@ -19,6 +19,7 @@ config SYS_TEXT_BASE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select X86_RESET_VECTOR
select USE_EARLY_BOARD_INIT
select INTEL_BROADWELL
select HAVE_INTEL_ME
select BOARD_ROMSIZE_KB_8192
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2 changes: 1 addition & 1 deletion board/intel/bayleybay/Makefile
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Expand Up @@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Bin Meng <[email protected]>

obj-y += bayleybay.o start.o
obj-y += bayleybay.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
8 changes: 0 additions & 8 deletions board/intel/bayleybay/start.S

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2 changes: 1 addition & 1 deletion board/intel/cherryhill/Makefile
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Expand Up @@ -2,4 +2,4 @@
#
# Copyright (C) 2017, Bin Meng <[email protected]>

obj-y += cherryhill.o start.o
obj-y += cherryhill.o
8 changes: 0 additions & 8 deletions board/intel/cherryhill/start.S

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2 changes: 1 addition & 1 deletion board/intel/cougarcanyon2/Makefile
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Expand Up @@ -2,4 +2,4 @@
#
# Copyright (C) 2016, Bin Meng <[email protected]>

obj-y += cougarcanyon2.o start.o
obj-y += cougarcanyon2.o
8 changes: 0 additions & 8 deletions board/intel/cougarcanyon2/start.S

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2 changes: 1 addition & 1 deletion board/intel/crownbay/Makefile
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Expand Up @@ -2,4 +2,4 @@
#
# Copyright (C) 2014, Bin Meng <[email protected]>

obj-y += crownbay.o start.o
obj-y += crownbay.o
8 changes: 0 additions & 8 deletions board/intel/crownbay/start.S

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2 changes: 1 addition & 1 deletion board/intel/edison/Makefile
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Expand Up @@ -4,5 +4,5 @@
# SPDX-License-Identifier: GPL-2.0+
#

obj-y += start.o edison.o
obj-y += edison.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
12 changes: 0 additions & 12 deletions board/intel/edison/start.S

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2 changes: 1 addition & 1 deletion board/intel/galileo/Makefile
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Expand Up @@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Bin Meng <[email protected]>

obj-y += galileo.o start.o
obj-y += galileo.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
8 changes: 0 additions & 8 deletions board/intel/galileo/start.S

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2 changes: 1 addition & 1 deletion board/intel/minnowmax/Makefile
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Expand Up @@ -2,5 +2,5 @@
#
# Copyright (C) 2015, Google, Inc

obj-y += minnowmax.o start.o
obj-y += minnowmax.o
obj-$(CONFIG_GENERATE_ACPI_TABLE) += dsdt.o
8 changes: 0 additions & 8 deletions board/intel/minnowmax/start.S

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2 changes: 1 addition & 1 deletion board/intel/slimbootloader/Makefile
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Expand Up @@ -2,4 +2,4 @@
#
# Copyright (C) 2019 Intel Corporation <www.intel.com>

obj-y += start.o slimbootloader.o
obj-y += slimbootloader.o
9 changes: 0 additions & 9 deletions board/intel/slimbootloader/start.S

This file was deleted.

3 changes: 2 additions & 1 deletion cmd/x86/mtrr.c
Original file line number Diff line number Diff line change
Expand Up @@ -121,7 +121,8 @@ static int do_mtrr(struct cmd_tbl *cmdtp, int flag, int argc,
if (argc < 1 || !cmd) {
cmd = 'l';
reg = 0;
} else {
}
if (cmd != 'l') {
if (argc < 2)
return CMD_RET_USAGE;
reg = simple_strtoul(argv[1], NULL, 16);
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2 changes: 1 addition & 1 deletion drivers/pinctrl/intel/Kconfig
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Expand Up @@ -22,7 +22,7 @@ config INTEL_PINCTRL_MULTI_ACPI_DEVICES
Enable this if the pinctrl devices are modelled as multiple,
separate ACPI devices in the ACPI tables. If enabled, the ACPI
devices match the U-Boot pinctrl devices and the pin 'offset' is
relatove to a particular pinctrl device. If disabled, there is a
relative to a particular pinctrl device. If disabled, there is a
single ACPI pinctrl device which includes all U-Boot pinctrl devices
and the pin 'offset' is in effect a global pin number.

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