Update LLVM (#1419)

* Update tests to use splat disassembly
google · Nov 14, 2024 · 425abc5 · 425abc5
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diff --git a/deps.json b/deps.json
@@ -6,7 +6,7 @@
       "subrepo" : "llvm/llvm-project",
       "branch" : "main",
       "subdir" : "third_party/llvm",
-      "commit" : "8431494094c8732d1426763d3e1aae322fa76830"
+      "commit" : "4cdfa2a2c80d59db10d1a17e4ff0ec9902952759"
     },
     {
       "name" : "SPIRV-Headers",

diff --git a/test/ImageBuiltins/read_image3d_with_literal_unorm_sampler.ll b/test/ImageBuiltins/read_image3d_with_literal_unorm_sampler.ll
@@ -6,7 +6,7 @@
 ; CHECK:  [[sizes:%[^ ]+]] = call <4 x i32> @_Z13get_image_dim11ocl_image3d(target("spirv.Image", void, 2, 0, 0, 0, 0, 0, 0) %img)
 ; CHECK:  [[sizes_convert:%[^ ]+]] = sitofp <4 x i32> [[sizes]] to <4 x float>
 ; CHECK:  [[floor:%[^ ]+]] = call <4 x float> @floor(<4 x float> [[convert]])
-; CHECK:  [[add:%[^ ]+]] = fadd <4 x float> [[floor]], <float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01>
+; CHECK:  [[add:%[^ ]+]] = fadd <4 x float> [[floor]], splat (float 5.000000e-01)
 ; CHECK:  [[div:%[^ ]+]] = fdiv <4 x float> [[add]], [[sizes_convert]]
 ; CHECK:  call <4 x float> @_Z11read_imagef14ocl_image3d_ro11ocl_samplerDv4_f(target("spirv.Image", void, 2, 0, 0, 0, 0, 0, 0) %img, target("spirv.Sampler") [[sampler]], <4 x float> [[div]])
 

diff --git a/test/ImageBuiltins/read_image3d_with_non_literal_sampler.ll b/test/ImageBuiltins/read_image3d_with_non_literal_sampler.ll
@@ -5,7 +5,7 @@
 ; CHECK:  [[image_dim:%[^ ]+]] = call <4 x i32> @_Z13get_image_dim11ocl_image3d(target("spirv.Image", float, 2, 0, 0, 0, 1, 0, 0, 0) %0)
 ; CHECK:  [[convert:%[^ ]+]] = sitofp <4 x i32> [[image_dim]] to <4 x float>
 ; CHECK:  [[floor:%[^ ]+]] = call <4 x float> @floor(<4 x float> [[coord]])
-; CHECK:  [[fadd:%[^ ]+]] = fadd <4 x float> [[floor]], <float 5.000000e-01, float 5.000000e-01, float 5.000000e-01, float 5.000000e-01>
+; CHECK:  [[fadd:%[^ ]+]] = fadd <4 x float> [[floor]], splat (float 5.000000e-01)
 ; CHECK:  [[fdiv_nearest:%[^ ]+]] = fdiv <4 x float> [[fadd]], [[convert]]
 ; CHECK:  [[fdiv_linear:%[^ ]+]] = fdiv <4 x float> [[coord]], [[convert]]
 ; CHECK:  [[sampler_mask:%[^ ]+]] = call i32 @clspv.get_normalized_sampler_mask(), !sampler_mask_push_constant_offset !29

diff --git a/test/IntegerBuiltins/add_sat/add_sat_char2.ll b/test/IntegerBuiltins/add_sat/add_sat_char2.ll
@@ -20,6 +20,6 @@ declare <2 x i8> @_Z7add_satDv2_cS_(<2 x i8>, <2 x i8>)
 ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %a to <2 x i16>
 ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %b to <2 x i16>
 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <2 x i16> [[sext_a]], [[sext_b]]
-; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i16> @_Z5clampDv2_sS_S_(<2 x i16> [[add]], <2 x i16> <i16 -128, i16 -128>, <2 x i16> <i16 127, i16 127>)
+; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i16> @_Z5clampDv2_sS_S_(<2 x i16> [[add]], <2 x i16> splat (i16 -128), <2 x i16> splat (i16 127))
 ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i16> [[clamp]] to <2 x i8>
 ; CHECK: ret <2 x i8> [[trunc]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_char3.ll b/test/IntegerBuiltins/add_sat/add_sat_char3.ll
@@ -20,6 +20,6 @@ declare <3 x i8> @_Z7add_satDv3_cS_(<3 x i8>, <3 x i8>)
 ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %a to <3 x i16>
 ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %b to <3 x i16>
 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <3 x i16> [[sext_a]], [[sext_b]]
-; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i16> @_Z5clampDv3_sS_S_(<3 x i16> [[add]], <3 x i16> <i16 -128, i16 -128, i16 -128>, <3 x i16> <i16 127, i16 127, i16 127>)
+; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i16> @_Z5clampDv3_sS_S_(<3 x i16> [[add]], <3 x i16> splat (i16 -128), <3 x i16> splat (i16 127))
 ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <3 x i16> [[clamp]] to <3 x i8>
 ; CHECK: ret <3 x i8> [[trunc]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_char4.ll b/test/IntegerBuiltins/add_sat/add_sat_char4.ll
@@ -20,6 +20,6 @@ declare <4 x i8> @_Z7add_satDv4_cS_(<4 x i8>, <4 x i8>)
 ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %a to <4 x i16>
 ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %b to <4 x i16>
 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <4 x i16> [[sext_a]], [[sext_b]]
-; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i16> @_Z5clampDv4_sS_S_(<4 x i16> [[add]], <4 x i16> <i16 -128, i16 -128, i16 -128, i16 -128>, <4 x i16> <i16 127, i16 127, i16 127, i16 127>)
+; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i16> @_Z5clampDv4_sS_S_(<4 x i16> [[add]], <4 x i16> splat (i16 -128), <4 x i16> splat (i16 127))
 ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <4 x i16> [[clamp]] to <4 x i8>
 ; CHECK: ret <4 x i8> [[trunc]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char2.ll
@@ -20,6 +20,6 @@ declare <2 x i8> @_Z7add_satDv2_cS_(<2 x i8>, <2 x i8>)
 ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %a to <2 x i32>
 ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <2 x i8> %b to <2 x i32>
 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <2 x i32> [[sext_a]], [[sext_b]]
-; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> <i32 -128, i32 -128>, <2 x i32> <i32 127, i32 127>)
+; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> splat (i32 -128), <2 x i32> splat (i32 127))
 ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[clamp]] to <2 x i8>
 ; CHECK: ret <2 x i8> [[trunc]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char3.ll
@@ -20,6 +20,6 @@ declare <3 x i8> @_Z7add_satDv3_cS_(<3 x i8>, <3 x i8>)
 ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %a to <3 x i32>
 ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <3 x i8> %b to <3 x i32>
 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <3 x i32> [[sext_a]], [[sext_b]]
-; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[add]], <3 x i32> <i32 -128, i32 -128, i32 -128>, <3 x i32> <i32 127, i32 127, i32 127>)
+; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[add]], <3 x i32> splat (i32 -128), <3 x i32> splat (i32 127))
 ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <3 x i32> [[clamp]] to <3 x i8>
 ; CHECK: ret <3 x i8> [[trunc]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_char4.ll
@@ -20,6 +20,6 @@ declare <4 x i8> @_Z7add_satDv4_cS_(<4 x i8>, <4 x i8>)
 ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %a to <4 x i32>
 ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <4 x i8> %b to <4 x i32>
 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <4 x i32> [[sext_a]], [[sext_b]]
-; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[add]], <4 x i32> <i32 -128, i32 -128, i32 -128, i32 -128>, <4 x i32> <i32 127, i32 127, i32 127, i32 127>)
+; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[add]], <4 x i32> splat (i32 -128), <4 x i32> splat (i32 127))
 ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <4 x i32> [[clamp]] to <4 x i8>
 ; CHECK: ret <4 x i8> [[trunc]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int2.ll
@@ -21,7 +21,7 @@ declare <2 x i32> @_Z7add_satDv2_iS_(<2 x i32>, <2 x i32>)
 ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> %b, zeroinitializer
 ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i32> [[add]], %a
 ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i32> [[add]], %a
-; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i32> <i32 -2147483648, i32 -2147483648>, <2 x i32> [[add]]
-; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i32> <i32 2147483647, i32 2147483647>, <2 x i32> [[add]]
+; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i32> splat (i32 -2147483648), <2 x i32> [[add]]
+; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i32> splat (i32 2147483647), <2 x i32> [[add]]
 ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[b_lt_0]], <2 x i32> [[min_clamp]], <2 x i32> [[max_clamp]]
 ; CHECK: ret <2 x i32> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int3.ll
@@ -21,7 +21,7 @@ declare <3 x i32> @_Z7add_satDv3_iS_(<3 x i32>, <3 x i32>)
 ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i32> %b, zeroinitializer
 ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <3 x i32> [[add]], %a
 ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i32> [[add]], %a
-; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i32> <i32 -2147483648, i32 -2147483648, i32 -2147483648>, <3 x i32> [[add]]
-; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i32> <i32 2147483647, i32 2147483647, i32 2147483647>, <3 x i32> [[add]]
+; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i32> splat (i32 -2147483648), <3 x i32> [[add]]
+; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i32> splat (i32 2147483647), <3 x i32> [[add]]
 ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[b_lt_0]], <3 x i32> [[min_clamp]], <3 x i32> [[max_clamp]]
 ; CHECK: ret <3 x i32> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_int4.ll
@@ -21,7 +21,7 @@ declare <4 x i32> @_Z7add_satDv4_iS_(<4 x i32>, <4 x i32>)
 ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i32> %b, zeroinitializer
 ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <4 x i32> [[add]], %a
 ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i32> [[add]], %a
-; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i32> <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648>, <4 x i32> [[add]]
-; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i32> <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>, <4 x i32> [[add]]
+; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i32> splat (i32 -2147483648), <4 x i32> [[add]]
+; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i32> splat (i32 2147483647), <4 x i32> [[add]]
 ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[b_lt_0]], <4 x i32> [[min_clamp]], <4 x i32> [[max_clamp]]
 ; CHECK: ret <4 x i32> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long2.ll
@@ -21,7 +21,7 @@ declare <2 x i64> @_Z7add_satDv2_lS_(<2 x i64>, <2 x i64>)
 ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> %b, zeroinitializer
 ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <2 x i64> [[add]], %a
 ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <2 x i64> [[add]], %a
-; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i64> <i64 -9223372036854775808, i64 -9223372036854775808>, <2 x i64> [[add]]
-; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i64> <i64 9223372036854775807, i64 9223372036854775807>, <2 x i64> [[add]]
+; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_gt_a]], <2 x i64> splat (i64 -9223372036854775808), <2 x i64> [[add]]
+; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[add_lt_a]], <2 x i64> splat (i64 9223372036854775807), <2 x i64> [[add]]
 ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[b_lt_0]], <2 x i64> [[min_clamp]], <2 x i64> [[max_clamp]]
 ; CHECK: ret <2 x i64> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long3.ll
@@ -21,7 +21,7 @@ declare <3 x i64> @_Z7add_satDv3_lS_(<3 x i64>, <3 x i64>)
 ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i64> %b, zeroinitializer
 ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <3 x i64> [[add]], %a
 ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <3 x i64> [[add]], %a
-; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i64> <i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808>, <3 x i64> [[add]]
-; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i64> <i64 9223372036854775807, i64 9223372036854775807, i64 9223372036854775807>, <3 x i64> [[add]]
+; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_gt_a]], <3 x i64> splat (i64 -9223372036854775808), <3 x i64> [[add]]
+; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[add_lt_a]], <3 x i64> splat (i64 9223372036854775807), <3 x i64> [[add]]
 ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[b_lt_0]], <3 x i64> [[min_clamp]], <3 x i64> [[max_clamp]]
 ; CHECK: ret <3 x i64> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_long4.ll
@@ -21,7 +21,7 @@ declare <4 x i64> @_Z7add_satDv4_lS_(<4 x i64>, <4 x i64>)
 ; CHECK: [[b_lt_0:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i64> %b, zeroinitializer
 ; CHECK: [[add_gt_a:%[a-zA-Z0-9_.]+]] = icmp sgt <4 x i64> [[add]], %a
 ; CHECK: [[add_lt_a:%[a-zA-Z0-9_.]+]] = icmp slt <4 x i64> [[add]], %a
-; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i64> <i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808, i64 -9223372036854775808>, <4 x i64> [[add]]
-; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i64> <i64 9223372036854775807, i64 9223372036854775807, i64 9223372036854775807, i64 9223372036854775807>, <4 x i64> [[add]]
+; CHECK: [[min_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_gt_a]], <4 x i64> splat (i64 -9223372036854775808), <4 x i64> [[add]]
+; CHECK: [[max_clamp:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[add_lt_a]], <4 x i64> splat (i64 9223372036854775807), <4 x i64> [[add]]
 ; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[b_lt_0]], <4 x i64> [[min_clamp]], <4 x i64> [[max_clamp]]
 ; CHECK: ret <4 x i64> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short2.ll
@@ -20,6 +20,6 @@ declare <2 x i16> @_Z7add_satDv2_sS_(<2 x i16>, <2 x i16>)
 ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %a to <2 x i32>
 ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <2 x i16> %b to <2 x i32>
 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <2 x i32> [[sext_a]], [[sext_b]]
-; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> <i32 -32768, i32 -32768>, <2 x i32> <i32 32767, i32 32767>)
+; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <2 x i32> @_Z5clampDv2_iS_S_(<2 x i32> [[add]], <2 x i32> splat (i32 -32768), <2 x i32> splat (i32 32767))
 ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <2 x i32> [[clamp]] to <2 x i16>
 ; CHECK: ret <2 x i16> [[trunc]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short3.ll
@@ -20,6 +20,6 @@ declare <3 x i16> @_Z7add_satDv3_sS_(<3 x i16>, <3 x i16>)
 ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <3 x i16> %a to <3 x i32>
 ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <3 x i16> %b to <3 x i32>
 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <3 x i32> [[sext_a]], [[sext_b]]
-; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[add]], <3 x i32> <i32 -32768, i32 -32768, i32 -32768>, <3 x i32> <i32 32767, i32 32767, i32 32767>)
+; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <3 x i32> @_Z5clampDv3_iS_S_(<3 x i32> [[add]], <3 x i32> splat (i32 -32768), <3 x i32> splat (i32 32767))
 ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <3 x i32> [[clamp]] to <3 x i16>
 ; CHECK: ret <3 x i16> [[trunc]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_short4.ll
@@ -20,6 +20,6 @@ declare <4 x i16> @_Z7add_satDv4_sS_(<4 x i16>, <4 x i16>)
 ; CHECK: [[sext_a:%[a-zA-Z0-9_.]+]] = sext <4 x i16> %a to <4 x i32>
 ; CHECK: [[sext_b:%[a-zA-Z0-9_.]+]] = sext <4 x i16> %b to <4 x i32>
 ; CHECK: [[add:%[a-zA-Z0-9_.]+]] = add nuw nsw <4 x i32> [[sext_a]], [[sext_b]]
-; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[add]], <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>)
+; CHECK: [[clamp:%[a-zA-Z0-9_.]+]] = call <4 x i32> @_Z5clampDv4_iS_S_(<4 x i32> [[add]], <4 x i32> splat (i32 -32768), <4 x i32> splat (i32 32767))
 ; CHECK: [[trunc:%[a-zA-Z0-9_.]+]] = trunc <4 x i32> [[clamp]] to <4 x i16>
 ; CHECK: ret <4 x i16> [[trunc]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_test_gen.cpp b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_test_gen.cpp
@@ -122,13 +122,7 @@ std::string SplatConstant(uint32_t vector, const std::string &type,
   if (vector == 1)
     return value;
 
-  std::string constant = "<";
-  for (auto i = 0; i < vector; ++i) {
-    constant += type + " " + value;
-    constant += (i == (vector - 1) ? "" : ", ");
-  }
-  constant += ">";
-  return constant;
+  return "splat (" + type + " " + value + ")";
 }
 
 std::string NotConstant(uint32_t vector) {

diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar2.ll
@@ -21,5 +21,5 @@ declare <2 x i8> @_Z7add_satDv2_hS_(<2 x i8>, <2 x i8>)
 ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i8>, <2 x i8> } [[call]], 0
 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i8>, <2 x i8> } [[call]], 1
 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i8> [[ex1]], zeroinitializer
-; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i8> [[ex0]], <2 x i8> <i8 -1, i8 -1>
+; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i8> [[ex0]], <2 x i8> splat (i8 -1)
 ; CHECK: ret <2 x i8> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar3.ll
@@ -21,5 +21,5 @@ declare <3 x i8> @_Z7add_satDv3_hS_(<3 x i8>, <3 x i8>)
 ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i8>, <3 x i8> } [[call]], 0
 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i8>, <3 x i8> } [[call]], 1
 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <3 x i8> [[ex1]], zeroinitializer
-; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i8> [[ex0]], <3 x i8> <i8 -1, i8 -1, i8 -1>
+; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i8> [[ex0]], <3 x i8> splat (i8 -1)
 ; CHECK: ret <3 x i8> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uchar4.ll
@@ -21,5 +21,5 @@ declare <4 x i8> @_Z7add_satDv4_hS_(<4 x i8>, <4 x i8>)
 ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i8>, <4 x i8> } [[call]], 0
 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i8>, <4 x i8> } [[call]], 1
 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i8> [[ex1]], zeroinitializer
-; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i8> [[ex0]], <4 x i8> <i8 -1, i8 -1, i8 -1, i8 -1>
+; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i8> [[ex0]], <4 x i8> splat (i8 -1)
 ; CHECK: ret <4 x i8> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint2.ll
@@ -21,5 +21,5 @@ declare <2 x i32> @_Z7add_satDv2_jS_(<2 x i32>, <2 x i32>)
 ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i32>, <2 x i32> } [[call]], 0
 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i32>, <2 x i32> } [[call]], 1
 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i32> [[ex1]], zeroinitializer
-; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[ex0]], <2 x i32> <i32 -1, i32 -1>
+; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i32> [[ex0]], <2 x i32> splat (i32 -1)
 ; CHECK: ret <2 x i32> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint3.ll
@@ -21,5 +21,5 @@ declare <3 x i32> @_Z7add_satDv3_jS_(<3 x i32>, <3 x i32>)
 ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i32>, <3 x i32> } [[call]], 0
 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i32>, <3 x i32> } [[call]], 1
 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <3 x i32> [[ex1]], zeroinitializer
-; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i32> [[ex0]], <3 x i32> <i32 -1, i32 -1, i32 -1>
+; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i32> [[ex0]], <3 x i32> splat (i32 -1)
 ; CHECK: ret <3 x i32> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_uint4.ll
@@ -21,5 +21,5 @@ declare <4 x i32> @_Z7add_satDv4_jS_(<4 x i32>, <4 x i32>)
 ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i32>, <4 x i32> } [[call]], 0
 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i32>, <4 x i32> } [[call]], 1
 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i32> [[ex1]], zeroinitializer
-; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i32> [[ex0]], <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
+; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i32> [[ex0]], <4 x i32> splat (i32 -1)
 ; CHECK: ret <4 x i32> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong2.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong2.ll
@@ -21,5 +21,5 @@ declare <2 x i64> @_Z7add_satDv2_mS_(<2 x i64>, <2 x i64>)
 ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i64>, <2 x i64> } [[call]], 0
 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <2 x i64>, <2 x i64> } [[call]], 1
 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <2 x i64> [[ex1]], zeroinitializer
-; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i64> [[ex0]], <2 x i64> <i64 -1, i64 -1>
+; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <2 x i1> [[cmp]], <2 x i64> [[ex0]], <2 x i64> splat (i64 -1)
 ; CHECK: ret <2 x i64> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong3.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong3.ll
@@ -21,5 +21,5 @@ declare <3 x i64> @_Z7add_satDv3_mS_(<3 x i64>, <3 x i64>)
 ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i64>, <3 x i64> } [[call]], 0
 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <3 x i64>, <3 x i64> } [[call]], 1
 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <3 x i64> [[ex1]], zeroinitializer
-; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i64> [[ex0]], <3 x i64> <i64 -1, i64 -1, i64 -1>
+; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <3 x i1> [[cmp]], <3 x i64> [[ex0]], <3 x i64> splat (i64 -1)
 ; CHECK: ret <3 x i64> [[sel]]
diff --git a/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong4.ll b/test/IntegerBuiltins/add_sat/add_sat_hack_clamp_ulong4.ll
@@ -21,5 +21,5 @@ declare <4 x i64> @_Z7add_satDv4_mS_(<4 x i64>, <4 x i64>)
 ; CHECK: [[ex0:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i64>, <4 x i64> } [[call]], 0
 ; CHECK: [[ex1:%[a-zA-Z0-9_.]+]] = extractvalue { <4 x i64>, <4 x i64> } [[call]], 1
 ; CHECK: [[cmp:%[a-zA-Z0-9_.]+]] = icmp eq <4 x i64> [[ex1]], zeroinitializer
-; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i64> [[ex0]], <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>
+; CHECK: [[sel:%[a-zA-Z0-9_.]+]] = select <4 x i1> [[cmp]], <4 x i64> [[ex0]], <4 x i64> splat (i64 -1)
 ; CHECK: ret <4 x i64> [[sel]]