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Experimental AMP Mode (IDFGH-11693) #12800
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This is amazing. I'd really love to see this option publicly available in ESP-IDF. It would come in handy especially for situations where you have SPI-drivers and an INT line to indicate that something did happen on the peripheral. Since it's not really advisable to use SPI from an ISR, the traditional way to handle this seems to be a high priority task that does the SPI communication which then gets woken up using direct-to-task-notification like With a bare metal loop being woken up by the IRQ (and an assorted bit-banging SPI driver), I would hope to eliminate this delay. The question then is how to communicate the payloads between the FreeRTOS core and the bare metal core. |
@FL0WL0W Thank you for the contribution! The changes done for updating |
Awesome! Let me know if you need anything from me. @mickeyl The built-in ESP-IDF driver for SPI should work on the bare metal second core, but I have not tested that. It would be great if you could test it from the bare metal core. You should also be able to notify tasks in FreeRTOS from the second core. |
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Hello @FL0WL0W, The changes for configNUM_CORES
macro replacement LGTM and I shall be pulling it in to our internal repository for tests. Unfortunately though, we won't be able to incorporate the IPC related changes as currently we don't have a mandate of maintaining an AMP compatible IDF.
sha=9cdb09c5e990ae45e0af1eaf887d3fa1a0d2dc16 |
@sudeep-mohanty I guess having some of my changes pulled is better than nothing. It is still unfortunate my other changes to the ipc will not get pulled. I will open a new pull request for some other changes that can hopefully be pulled in. |
Hi @FL0WL0W, |
@sudeep-mohanty That's very good news, thanks Espressif for reconsidering! |
…REERTOS_UNICORE=n
PR updated and merged at 9605f9b. Closing this PR. |
Thanks again, @FL0WL0W and @sudeep-mohanty. Going to do more experiments with this mode soon(ish). This is what puts Espressif apart from many other silicon vendors in the industry. Not only is your responsivity superb, but you're also open to 3rd party contributions when they make sense. |
@mickeyl careful, they did not add the AMP functionality. They only updated their C definitions to match closer to what they should be. All the changes needed to the cpu_start and the ipc_task were not accepted. @sudeep-mohanty I will look over the changes and make another PR if I see anything wrong. Thanks. |
@FL0WL0W Oops, thanks for the warning. I'll stick with your fork then. The smaller the diff is the better though… and perhaps you can get more upstream eventually. |
Changes needed to make AMP mode work.
Because the ESP port needs to run on 2 cores and the FREERTOS on 1 core, there became a conflict with the current usage of portNUM_PROCESSORS and configNUM_CORES. Because of this, I changed all areas looking at these definitions in relation to FREERTOS to use configNUM_CORES, and all areas of the ESP port to use portNUM_PROCESSORS. This is what i understand to be the correct ussage of these definitions.
The second core entry point is app_main1() and defaults into a delay loop. This code is found in app_startup.c. The check for making sure CONFIG_FREERTOS_UNICORE == CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE was removed since AMP is now experimentally supported.
The esp_ipc was modified in order to use crosscore_int to trigger the second core handling of ipc functions when in AMP mode. The first core still handles ipc functions through the RTOS task. Some code was rearranged to make this cohesive and readable. This consists of the bulk of the changes in this PR.
Some more CONFIG_FREERTOS_UNICORE checks were changed to CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE
I tested this by building my interrupt example and have been able to demonstrate a marked improvement on Interrupt Jitter. It is now within 1us.
https://github.com/FL0WL0W/ESP32InterruptExample/tree/AMP
Relevant issues
#10410
#11830