Merge branch 'refactor/remove_redundant_config_in_i2s_ll' into 'master'

refactor(dac): remove redundant ll config for dac mode

Closes IDFGH-11625

See merge request espressif/esp-idf!27732

components/driver/deprecated/i2s_legacy.c

@@ -885,6 +885,7 @@ static void i2s_adc_set_slot_legacy(void)
     i2s_ll_rx_set_ws_width(dev, slot_cfg->slot_bit_width);
     i2s_ll_rx_enable_msb_right(dev, false);
     i2s_ll_rx_enable_right_first(dev, false);
+    i2s_ll_rx_select_std_slot(dev, I2S_STD_SLOT_LEFT, false);
     /* Should always enable fifo */
     i2s_ll_rx_force_enable_fifo_mod(dev, true);
 }
@@ -1473,15 +1474,14 @@ static esp_err_t i2s_init_legacy(i2s_port_t i2s_num, int intr_alloc_flag)
         if (p_i2s[i2s_num]->dir & I2S_DIR_RX) {
             sar_periph_ctrl_adc_continuous_power_acquire();
             adc_set_i2s_data_source(ADC_I2S_DATA_SRC_ADC);
-            i2s_ll_enable_builtin_adc(p_i2s[i2s_num]->hal.dev, true);
+            i2s_ll_enable_builtin_adc_dac(p_i2s[i2s_num]->hal.dev, true);
         }
         if (p_i2s[i2s_num]->dir & I2S_DIR_TX) {
-            i2s_ll_enable_builtin_dac(p_i2s[i2s_num]->hal.dev, true);
+            i2s_ll_enable_builtin_adc_dac(p_i2s[i2s_num]->hal.dev, true);
         }
     } else {
         adc_set_i2s_data_source(ADC_I2S_DATA_SRC_IO_SIG);
-        i2s_ll_enable_builtin_adc(p_i2s[i2s_num]->hal.dev, false);
-        i2s_ll_enable_builtin_dac(p_i2s[i2s_num]->hal.dev, false);
+        i2s_ll_enable_builtin_adc_dac(p_i2s[i2s_num]->hal.dev, false);
     }
 #endif
 

components/esp_driver_dac/esp32/dac_dma.c

@@ -125,7 +125,7 @@ esp_err_t dac_dma_periph_init(uint32_t freq_hz, bool is_alternate, bool is_apll)
     }
     ESP_GOTO_ON_ERROR(s_dac_dma_periph_set_clock(freq_hz, is_apll), err, TAG, "Failed to set clock of DMA peripheral");
 
-    i2s_ll_enable_builtin_dac(s_ddp->periph_dev, true);
+    i2s_ll_enable_builtin_adc_dac(s_ddp->periph_dev, true);
     i2s_ll_tx_reset(s_ddp->periph_dev);
     i2s_ll_tx_set_slave_mod(s_ddp->periph_dev, false);
     i2s_ll_tx_set_sample_bit(s_ddp->periph_dev, DAC_DMA_PERIPH_I2S_BIT_WIDTH, DAC_DMA_PERIPH_I2S_BIT_WIDTH);

components/hal/adc_hal.c

@@ -120,7 +120,11 @@ void adc_hal_digi_init(adc_hal_dma_ctx_t *hal)
     i2s_ll_rx_set_sample_bit(hal->dev, SAMPLE_BITS, SAMPLE_BITS);
     i2s_ll_rx_enable_mono_mode(hal->dev, 1);
     i2s_ll_rx_force_enable_fifo_mod(hal->dev, 1);
-    i2s_ll_enable_builtin_adc(hal->dev, 1);
+    i2s_ll_rx_enable_right_first(hal->dev, false);
+    i2s_ll_rx_enable_msb_shift(hal->dev, false);
+    i2s_ll_rx_set_ws_width(hal->dev, 16);
+    i2s_ll_rx_select_std_slot(hal->dev, I2S_STD_SLOT_LEFT, false);
+    i2s_ll_enable_builtin_adc_dac(hal->dev, 1);
 #endif
 
     adc_oneshot_ll_disable_all_unit();

components/hal/esp32/include/hal/i2s_ll.h

@@ -1131,36 +1131,15 @@ static inline void i2s_ll_enable_camera(i2s_dev_t *hw, bool enable)
 }
 
 /**
- * @brief Enable I2S build in ADC mode
+ * @brief Enable I2S built-in ADC/DAC mode
  *
  * @param hw Peripheral I2S hardware instance address.
- * @param enable Set true to enable build in ADC
+ * @param enable Set true to enable built-in ADC/DAC
  */
-static inline void i2s_ll_enable_builtin_adc(i2s_dev_t *hw, bool enable)
+static inline void i2s_ll_enable_builtin_adc_dac(i2s_dev_t *hw, bool enable)
 {
     hw->conf2.lcd_en = enable;
     hw->conf2.camera_en = 0;
-    hw->conf.rx_right_first = 0;
-    hw->conf.rx_msb_shift = 0;
-    hw->conf.rx_mono = 0;
-    hw->conf.rx_short_sync = 0;
-    hw->fifo_conf.rx_fifo_mod = enable;
-    hw->conf_chan.rx_chan_mod = enable;
-}
-
-/**
- * @brief Enable I2S build in DAC mode
- *
- * @param hw Peripheral I2S hardware instance address.
- *  * @param enable Set true to enable build in DAC
- */
-static inline void i2s_ll_enable_builtin_dac(i2s_dev_t *hw, bool enable)
-{
-    hw->conf2.lcd_en = enable;
-    hw->conf2.camera_en = 0;
-    hw->conf.tx_right_first = enable;
-    hw->conf.tx_msb_shift = 0;
-    hw->conf.tx_short_sync = 0;
 }
 
 #ifdef __cplusplus