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fix(esp): Fix getFlashChipMode breaking on S3 and C3 (#9826)
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Jason2866 authored Jun 12, 2024
1 parent 12d4226 commit a6df1f5
Showing 1 changed file with 5 additions and 4 deletions.
9 changes: 5 additions & 4 deletions cores/esp32/Esp.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -59,10 +59,11 @@ extern "C" {
// REG_SPI_BASE is not defined for S3/C3 ??

#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3
#ifndef REG_SPI_BASE
#define REG_SPI_BASE(i) (DR_REG_SPI1_BASE + (((i)>1) ? (((i)* 0x1000) + 0x20000) : (((~(i)) & 1)* 0x1000 )))
#endif // REG_SPI_BASE
#endif // TARGET
#ifdef REG_SPI_BASE
#undef REG_SPI_BASE
#endif // REG_SPI_BASE
#define REG_SPI_BASE(i) (DR_REG_SPI1_BASE + (((i) > 1) ? (((i) * 0x1000) + 0x20000) : (((~(i)) & 1) * 0x1000)))
#endif // TARGET

/**
* User-defined Literals
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