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ESP32S3 ADC reading not working as expected Add new issues to project #825: Issue #2815 opened by DS204ever
December 13, 2024 12:35 20s
December 13, 2024 12:35 20s
We do not distinguish NACK sources (address/data) which embedded-hal supports. Adding this would change the Error type, most likely renaming the AckCheckFailed variant. Add new issues to project #824: Issue #2814 opened by bugadani
December 13, 2024 12:16 13s
December 13, 2024 12:16 13s
Wake-up (e.g. light sleep) Add new issues to project #823: Issue #2813 opened by bugadani
December 13, 2024 12:12 9s
December 13, 2024 12:12 9s
C-FAILURE: Function docs include error, panic, and safety considerations Add new issues to project #822: Issue #2812 opened by bugadani
December 13, 2024 12:11 17s
December 13, 2024 12:11 17s
C-QUESTION-MARK: Examples use ?, not try!, not unwrap Add new issues to project #821: Issue #2811 opened by bugadani
December 13, 2024 12:11 14s
December 13, 2024 12:11 14s
C-COMMON-TRAITS Add new issues to project #820: Issue #2810 opened by bugadani
December 13, 2024 12:11 11s
December 13, 2024 12:11 11s
Allow using SPI1, if we can automatically handle its specific requirements: driver must be in IRAM, interrupt handlers must either be masked or be in IRAM, GPIO assignment (probably?) needs to be restored after use. Add new issues to project #819: Issue #2809 opened by bjoernQ
December 13, 2024 11:56 10s
December 13, 2024 11:56 10s
Do we want the single byte read/write inherent functions? or are they optimized for the job and are much more efficient? is it a common use case? Add new issues to project #818: Issue #2808 opened by bjoernQ
December 13, 2024 11:55 10s
December 13, 2024 11:55 10s
Should we get rid of nb::Result for inherent functions? Add new issues to project #817: Issue #2807 opened by bjoernQ
December 13, 2024 11:54 9s
December 13, 2024 11:54 9s
Variants of Address and Command could be changed into s.th. like Bits1, Bits2 or similar to avoid repeating the enum name Add new issues to project #816: Issue #2806 opened by bjoernQ
December 13, 2024 11:54 10s
December 13, 2024 11:54 10s
SpiBitOrder, SpiDataMode, SpiMode: the Spi prefix seems redundant Add new issues to project #815: Issue #2805 opened by bjoernQ
December 13, 2024 11:53 12s
December 13, 2024 11:53 12s
spi::master::Config uses HertzU32 etc from fugit, which aren't stable Add new issues to project #814: Issue #2804 opened by bjoernQ
December 13, 2024 11:53 13s
December 13, 2024 11:53 13s
Expose Double Transfer Rate where supported Add new issues to project #813: Issue #2803 opened by bjoernQ
December 13, 2024 11:53 10s
December 13, 2024 11:53 10s
Ability to transfer bit arrays (data that is not a multiple of 8 bits). Add new issues to project #812: Issue #2802 opened by bjoernQ
December 13, 2024 11:52 10s
December 13, 2024 11:52 10s
SPI: Expose timing delays Add new issues to project #811: Issue #2801 opened by bjoernQ
December 13, 2024 11:50 10s
December 13, 2024 11:50 10s
Allow using the RX half and TX half in different (CPU/DMA) modes (Sometimes you only really need DMA in one half of the SPI transfer. This one might be difficult to support) Add new issues to project #810: Issue #2800 opened by bjoernQ
December 13, 2024 11:50 13s
December 13, 2024 11:50 13s
Expose SPI interrupts Add new issues to project #809: Issue #2799 opened by bjoernQ
December 13, 2024 11:49 10s
December 13, 2024 11:49 10s
Allow splitting the SPI FiFo into two halves (All chips support doing this, and it allows for double buffering without DMA) Add new issues to project #808: Issue #2798 opened by bjoernQ
December 13, 2024 11:49 22s
December 13, 2024 11:49 22s
Expose the KEEP_CS_ACTIVE option (This is important for chunked transfers in a single transaction) Add new issues to project #807: Issue #2797 opened by bjoernQ
December 13, 2024 11:49 11s
December 13, 2024 11:49 11s
CS timings Add new issues to project #806: Issue #2796 opened by bjoernQ
December 13, 2024 11:48 11s
December 13, 2024 11:48 11s
Expose all the CS signals (The SPI hardware can take multiple CS pins and turn them on/off for each transfer. Software CS shouldn't be the long term solution for shared buses) Add new issues to project #805: Issue #2795 opened by bjoernQ
December 13, 2024 11:48 11s
December 13, 2024 11:48 11s
SPI: C-FAILURE: Function docs include error, panic, and safety considerations. (again, good in Safety, but Errors and Panics are missing. Add new issues to project #804: Issue #2794 opened by bjoernQ
December 13, 2024 11:47 10s
December 13, 2024 11:47 10s
SPI: We already started marking parts of the driver as unstable but there are some inconsistencies currently Add new issues to project #803: Issue #2793 opened by bjoernQ
December 13, 2024 11:42 11s
December 13, 2024 11:42 11s
SPI: Config doesn't derive Hash Add new issues to project #802: Issue #2792 opened by bjoernQ
December 13, 2024 11:40 17s
December 13, 2024 11:40 17s
SPI: Driver structs don't derive PartialEq/Eq Add new issues to project #801: Issue #2791 opened by bjoernQ
December 13, 2024 11:39 13s
December 13, 2024 11:39 13s