[SiVal, usbdev] Link tx_rx_test to vbus_test in tesplan

Signed-off-by: Douglas Reis <[email protected]>
engdoreis · Dec 10, 2024 · 0f7d95f · 0f7d95f
1 parent 5f76afd
commit 0f7d95f
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson b/hw/top_earlgrey/data/ip/chip_usbdev_testplan.hjson
@@ -221,7 +221,7 @@
       si_stage: SV3
       lc_states: ["PROD"]
       tests: ["chip_sw_usbdev_dpi"]
-      bazel: []
+      bazel: ["//sw/device/tests:usbdev_test"]
     }
     {
       name: chip_sw_usbdev_stream