Test write to ROM (#433)

hw-model/test-fw/Cargo.toml

@@ -45,3 +45,8 @@ required-features = ["riscv"]
 name = "test_invalid_instruction"
 path = "test_invalid_instruction.rs"
 required-features = ["riscv"]
+
+[[bin]]
+name = "test_write_to_rom"
+path = "test_write_to_rom.rs"
+required-features = ["riscv"]

hw-model/test-fw/test_write_to_rom.rs

@@ -0,0 +1,25 @@
+// Licensed under the Apache-2.0 license
+
+//! A very simple program to test the behavior of the CPU when trying to write to ROM.
+
+#![no_main]
+#![no_std]
+
+// Needed to bring in startup code
+#[allow(unused)]
+use caliptra_test_harness::println;
+
+#[panic_handler]
+pub fn panic(_info: &core::panic::PanicInfo) -> ! {
+    loop {}
+}
+
+#[no_mangle]
+extern "C" fn main() {
+    unsafe {
+        let rom_address = 0x00_u32;
+        let rom_address_ptr = rom_address as *mut u32;
+        *rom_address_ptr = 0xdeadbeef;
+    }
+    loop {}
+}

hw-model/tests/model_tests.rs

@@ -116,3 +116,19 @@ fn test_invalid_instruction_exception_failure() {
         harness::NMI_CAUSE_ILLEGAL_INSTRUCTION_ERROR
     );
 }
+
+#[test]
+fn test_write_to_rom() {
+    let elf = caliptra_builder::build_firmware_elf(&FwId {
+        bin_name: "test_write_to_rom",
+        ..BASE_FWID
+    })
+    .unwrap();
+    let mut model = run_fw_elf(&elf);
+    model.step_until_exit_success().unwrap_err();
+    let soc_ifc: caliptra_registers::soc_ifc::RegisterBlock<_> = model.soc_ifc();
+    assert_eq!(
+        soc_ifc.cptra_fw_error_non_fatal().read(),
+        harness::ERROR_EXCEPTION
+    );
+}