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[cdm16] Update processor microcode
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Intelix8996 committed Feb 5, 2023
1 parent b6981f6 commit 6523e9f
Showing 1 changed file with 26 additions and 23 deletions.
49 changes: 26 additions & 23 deletions logisim/cdm16/microcode/cdm16_decoder.def
Original file line number Diff line number Diff line change
Expand Up @@ -68,33 +68,33 @@ read
# 0 op
zero: # Treat 0x0000 op code as invalid

res_1:
res_2:
res_3:

halt: word # Just to put CUT
wait: word
ei: word
di: word

jsr: mem, data, word, sp_dec, sp_asrt0, pc_asrtD;
mem, word, read, pc_asrt0, pc_latch

rts: mem, data, word, read, sp_asrt0, pc_latch, sp_inc

rti: mem, data, word, read, sp_asrt0, pc_latch, sp_inc;
mem, data, word, read, sp_asrt0, ps_latch_word, sp_inc

pups: mem, data, word, sp_dec, sp_asrt0, ps_asrtD

pops: mem, data, word, read, sp_asrt0, ps_latch_word, sp_inc

pupc: mem, data, word, sp_dec, sp_asrt0, pc_asrtD # with jsr? macro
pupc: mem, data, word, sp_dec, sp_asrt0, pc_asrtD

popc: mem, data, word, read, sp_asrt0, pc_latch, sp_inc

halt: word # Just to put CUT
wait: word
ei: word
di: word
res_es:
res_ds:

pusp: mem, data, word, sp_dec, sp_asrt0, sp_asrtD

posp: mem, data, word, read, sp_asrt0, sp_latch

pups: mem, data, word, sp_dec, sp_asrt0, ps_asrtD

pops: mem, data, word, read, sp_asrt0, ps_latch_word, sp_inc

# 1 op
push: mem, data, word, sp_dec, sp_asrt0, r_asrtD

Expand Down Expand Up @@ -179,8 +179,8 @@ stsw_n: mem, data, word, fp_asrt0, imm_asrt1, imm_shift, r_asrtD, imm_ex
stsb_p: mem, data, fp_asrt0, imm_asrt1, imm_shift, r_asrtD
stsb_n: mem, data, fp_asrt0, imm_asrt1, imm_shift, r_asrtD, imm_extend_negative

ldi_p: pc_inc, r_latch, imm_asrtD
ldi_n: pc_inc, r_latch, imm_asrtD, imm_extend_negative
ldi_p: r_latch, imm_asrtD
ldi_n: r_latch, imm_asrtD, imm_extend_negative
add_p: r_asrt0, imm_asrt1, alu_asrtD, r_latch, ps_latch_flags
add_n: r_asrt0, imm_asrt1, alu_asrtD, r_latch, ps_latch_flags, imm_extend_negative
cmp_p: r_asrt0, imm_asrt1, ps_latch_flags
Expand All @@ -191,18 +191,21 @@ int: mem, data, word, sp_asrt0, sp_dec, ps_asrtD;
mem, data, word, sp_asrt0, sp_dec, pc_asrtD;
mem, read, word, imm_asrt1, pc_latch;
mem, read, word, imm_asrt1, ps_latch_word

push_p: mem, data, word, sp_dec, sp_asrt0, imm_asrtD

imm9_1:

push_p: mem, data, word, sp_dec, sp_asrt0, imm_asrtD
push_n: mem, data, word, sp_dec, sp_asrt0, imm_asrtD, imm_extend_negative

addsp_p: sp_asrt0, imm_asrt1, imm_shift, alu_asrtD, sp_latch

addsp_n: sp_asrt0, imm_asrt1, imm_shift, alu_asrtD, sp_latch, imm_extend_negative

imm9_5:
imm9_6:
imm9_7:
jsr_rel_p: mem, data, word, sp_dec, sp_asrt0, pc_asrtD;
pc_asrt0, imm_asrt1, imm_shift, alu_asrtD, pc_latch

jsr_rel_n: mem, data, word, sp_dec, sp_asrt0, pc_asrtD;
pc_asrt0, imm_asrt1, imm_extend_negative, imm_shift, alu_asrtD

imm9_8:
imm9_9:
imm9_A:
Expand Down Expand Up @@ -238,7 +241,7 @@ br_abs: mem, read, word, pc_asrt0, pc_latch
shifts_alu2: r_asrt0, alu_asrtD, r_latch, ps_latch_flags
alu3_ind: r_asrt0, r_asrt1, ps_latch_flags
alu3: r_asrt0, r_asrt1, alu_asrtD, r_latch, ps_latch_flags
br_rel_n: pc_asrt0, imm_asrt1, imm_extend_negative, imm_shift, alu_asrtD, pc_latch
br_rel_p: pc_asrt0, imm_asrt1, imm_shift, alu_asrtD, pc_latch
br_rel_n: pc_asrt0, imm_asrt1, imm_extend_negative, imm_shift, alu_asrtD, pc_latch
br_nop: pc_inc
fetch: word, read, mem, pc_asrt0, pc_inc

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