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Ci flwadd #514

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452932a
bigblade
tommydcjung Dec 6, 2020
a7357de
multipod spmd support
tommydcjung Jan 12, 2021
9fe856a
global_pod_ptr test
tommydcjung Jan 12, 2021
dc92ab8
remove south io router row
tommydcjung Jan 12, 2021
c54aa8c
include right side ruche buffer inside the pod
tommydcjung Jan 13, 2021
dbf3be9
bsg_tag interface on pods
tommydcjung Jan 13, 2021
65159ee
fix bug
tommydcjung Jan 15, 2021
03a140f
override bsg_pod x y
tommydcjung Jan 15, 2021
1b22d35
fix branch_rv32
tommydcjung Jan 15, 2021
ffb8616
Minor fix to bsg_manycore_hor_io_router filter
dpetrisko Jan 16, 2021
d11ef58
Tieing off unnecessary ruche link ports on io router (#456)
dpetrisko Jan 19, 2021
8ab692e
simplify remote resp force logic
tommydcjung Jan 16, 2021
4fc8116
typo
tommydcjung Jan 16, 2021
af10ab7
Move wormhole concentrator outside pod ruche array (#457)
gaozihou Jan 22, 2021
79819d2
Bigblade interrupt (#458)
tommydcjung Jan 25, 2021
7225afa
prevent updating npc_r while in interrupt; add debugging pc signals
tommydcjung Jan 26, 2021
0debc61
bsg_manycore_endpoint_standard use e_remote_sw
tommydcjung Jan 27, 2021
9f56876
use packet_lo.reg_id for e_remote_sw
tommydcjung Jan 27, 2021
1c5b2fd
io rtr tag client (#461)
tommydcjung Feb 1, 2021
1aceb6b
fix sw handling (#462)
tommydcjung Feb 1, 2021
0e31ab8
reduce tag payload for wh_dest_cord (#465)
tommydcjung Feb 3, 2021
9e2dc33
Bigblade wh return fifo (#467)
tommydcjung Feb 3, 2021
fd75efb
Reset done dpi (#466)
mrutt92 Feb 4, 2021
8ded807
Bigblade dmem addr shift (#459)
tommydcjung Feb 4, 2021
1224feb
use mutex for coremark ee_printf.c
tommydcjung Feb 5, 2021
cebe024
split wh traffic (#471)
tommydcjung Feb 6, 2021
e9aa583
CI Bigblade Interrupt Tests (#468)
sripathi-muralitharan Feb 7, 2021
0496018
fix sp to 4KB-4
tommydcjung Feb 7, 2021
c78197e
npc mret (#463)
tommydcjung Feb 7, 2021
268e537
CI interrupt
tommydcjung Feb 8, 2021
43ba88e
hbm2 to vcache mapping (#474)
tommydcjung Feb 18, 2021
4e46e98
prevent firing assertion when clear and score is done on int x0 at th…
tommydcjung Feb 24, 2021
d2cbcda
Update README.md
taylor-bsg Feb 26, 2021
6d3e3cd
Update README.md
taylor-bsg Feb 26, 2021
4826dc5
Update README.md
taylor-bsg Feb 26, 2021
52c5266
Update README.md
taylor-bsg Feb 27, 2021
6347bd2
add bsg_barrier timing routine. takeaway: very slow
taylor-bsg Feb 27, 2021
ae35a86
Merge branch 'ci_bigblade' of https://github.com/bespoke-silicon-grou…
taylor-bsg Feb 27, 2021
dbfbac2
add verbose_p option to bsg_nonsynth_manycore_spmd_loader
taylor-bsg Feb 27, 2021
5d1fc80
Reset coord feedthrough [experiment] (#475)
tommydcjung Feb 27, 2021
0754303
write to jalr_prediction_r only when rd = 1 or 5
tommydcjung Mar 1, 2021
22cc463
reset, comment
tommydcjung Mar 2, 2021
098cde9
Merge pull request #482 from bespoke-silicon-group/ras_write_logic
taylor-bsg Mar 2, 2021
df98cf6
add profile builds; pod barrier; convenience fns
taylor-bsg Mar 2, 2021
1d50086
optimizations to pod_barrier
taylor-bsg Mar 2, 2021
a792856
clean up / gitignore machine results
tommydcjung Mar 3, 2021
74d8738
Added parameters to top level (#483)
drichmond Mar 3, 2021
bcbec17
Atomic Add support (#476)
sripathi-muralitharan Mar 3, 2021
79be16f
Fixes header_print_p input in manycore testbench (#484)
mrutt92 Mar 3, 2021
1a2f5f7
optimize pod barrier implementation to 87 cycles
taylor-bsg Mar 4, 2021
a8cecb4
Merge branch 'ci_bigblade' of https://github.com/bespoke-silicon-grou…
taylor-bsg Mar 4, 2021
5abe472
add asm timing to asm_memcpy_dram
taylor-bsg Mar 4, 2021
aa1d1cd
CUDA test for checking memory map (#487)
mrutt92 Mar 5, 2021
b306356
SAIF File Generator (#485)
drichmond Mar 9, 2021
71319f5
Store words to infinite memory (#491)
sripathi-muralitharan Mar 15, 2021
70ccd9a
Compiles C++ sim files with -O2 (#494)
mrutt92 Mar 16, 2021
cd46848
adding hbm2 CI (#495)
tommydcjung Mar 16, 2021
841fbfa
Added print_stat wires to DRAMSim3 (#486)
drichmond Mar 16, 2021
3e933ed
Pulled hetero_type_vec to top level of common testbench (#489)
drichmond Mar 17, 2021
644f238
set wh dest by network packet (#496)
tommydcjung Mar 17, 2021
83a5736
dramsim3 json txt gitignore
tommydcjung Mar 17, 2021
500c948
dramsim3.tag.json gitignore
tommydcjung Mar 18, 2021
0f657f2
Bigblade memory plumbing (#488)
tommydcjung Mar 21, 2021
647dda8
Ci 4x4 (#498)
tommydcjung Mar 23, 2021
9c30eb9
saif test no-recurse
tommydcjung Mar 23, 2021
7831676
Add e_remote_sw to link_to_cache case statement (#501)
drichmond Mar 29, 2021
baea7ff
remove 4x4 hbm2 (#502)
tommydcjung Mar 30, 2021
a6a995d
refactor dram hash func
tommydcjung Mar 31, 2021
c1c4393
Parser fixes (#504)
drichmond Mar 31, 2021
3f4b5a1
add comment about address format
tommydcjung Apr 1, 2021
82b52ef
imul mux order (#500)
tommydcjung Apr 1, 2021
6066b5e
Merge pull request #505 from bespoke-silicon-group/ci_dram_hash
taylor-bsg Apr 2, 2021
6cace26
Ci pod refactor (#499)
tommydcjung Apr 6, 2021
f984cc6
Update Makefile.llvminstall (#506)
dpetrisko Apr 7, 2021
9081216
surround hetero type stuff so dc doesn't crash (#508)
tommydcjung Apr 14, 2021
567a984
Ci num clk ports (#509)
tommydcjung Apr 16, 2021
3acb35f
fix ruche connection on the east row edge (#510)
tommydcjung Apr 16, 2021
43f78e7
flwadd
tommydcjung Apr 20, 2021
09af7aa
comments
tommydcjung Apr 20, 2021
9a4d722
move flwadd to flw opcode space
tommydcjung Apr 21, 2021
ea733cc
forwarding logic fix
tommydcjung Apr 21, 2021
f21a590
tests
tommydcjung Apr 21, 2021
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144 changes: 141 additions & 3 deletions .gitlab-ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,9 @@ variables:
stages:
- checkout
- build
- test
- test_1x1
- test_1x1_hbm2
- test_4x4

build-repos:
stage: checkout
Expand All @@ -19,6 +21,7 @@ build-repos:
- git clone --recursive -b $CI_COMMIT_REF_NAME https://github.com/bespoke-silicon-group/bsg_manycore.git
- echo "pwd"
- echo $CI_PROJECT_DIR
- echo $CI_COMMIT_REF_NAME
- >
if [ -e cache/ ]; then
echo "Pulling toolchain installation from cache...";
Expand Down Expand Up @@ -100,7 +103,7 @@ build-toolchain:
retry: 2

test-spmd:
stage: test
stage: test_1x1
tags:
- bsg
- vcs
Expand All @@ -125,7 +128,7 @@ test-spmd:


test-beebs:
stage: test
stage: test_1x1
tags:
- bsg
- vcs
Expand All @@ -147,3 +150,138 @@ test-beebs:
- /^ci_.*$/
- master
retry: 2


test-interrupt:
stage: test_1x1
tags:
- bsg
- vcs
script:
- echo "Running interrupt regression..."
- cd bsg_manycore
- pwd
- ./ci/interrupt.sh
cache:
key: $CI_COMMIT_REF_NAME
paths:
- $CI_PROJECT_DIR/bsg_cadenv
- $CI_PROJECT_DIR/basejump_stl
- $CI_PROJECT_DIR/bsg_manycore
- $CI_PROJECT_DIR/bsg_bladerunner
policy: pull
only:
refs:
- /^ci_.*$/
- master
retry: 2



test-spmd-hbm2:
stage: test_1x1_hbm2
tags:
- bsg
- vcs
script:
- export BSG_MACHINE_PATH=$CI_PROJECT_DIR/bsg_manycore/machines/pod_1x1_hbm2
- echo "Running Manycore regression..."
- cd bsg_manycore
- pwd
- ./ci/spmd.sh
cache:
key: $CI_COMMIT_REF_NAME
paths:
- $CI_PROJECT_DIR/bsg_cadenv
- $CI_PROJECT_DIR/basejump_stl
- $CI_PROJECT_DIR/bsg_manycore
- $CI_PROJECT_DIR/bsg_bladerunner
policy: pull
only:
refs:
- /^ci_.*$/
- master
retry: 2


test-interrupt-hbm2:
stage: test_1x1_hbm2
tags:
- bsg
- vcs
script:
- export BSG_MACHINE_PATH=$CI_PROJECT_DIR/bsg_manycore/machines/pod_1x1_hbm2
- echo "Running interrupt regression..."
- cd bsg_manycore
- pwd
- ./ci/interrupt.sh
cache:
key: $CI_COMMIT_REF_NAME
paths:
- $CI_PROJECT_DIR/bsg_cadenv
- $CI_PROJECT_DIR/basejump_stl
- $CI_PROJECT_DIR/bsg_manycore
- $CI_PROJECT_DIR/bsg_bladerunner
policy: pull
only:
refs:
- /^ci_.*$/
- master
retry: 2







test-spmd-4x4:
stage: test_4x4
tags:
- bsg
- vcs
script:
- export BSG_MACHINE_PATH=$CI_PROJECT_DIR/bsg_manycore/machines/pod_4x4
- echo "Running Manycore regression..."
- cd bsg_manycore
- pwd
- ./ci/spmd.sh
cache:
key: $CI_COMMIT_REF_NAME
paths:
- $CI_PROJECT_DIR/bsg_cadenv
- $CI_PROJECT_DIR/basejump_stl
- $CI_PROJECT_DIR/bsg_manycore
- $CI_PROJECT_DIR/bsg_bladerunner
policy: pull
only:
refs:
- /^ci_.*$/
- master
retry: 2


test-interrupt-4x4:
stage: test_4x4
tags:
- bsg
- vcs
script:
- export BSG_MACHINE_PATH=$CI_PROJECT_DIR/bsg_manycore/machines/pod_4x4
- echo "Running interrupt regression..."
- cd bsg_manycore
- pwd
- ./ci/interrupt.sh
cache:
key: $CI_COMMIT_REF_NAME
paths:
- $CI_PROJECT_DIR/bsg_cadenv
- $CI_PROJECT_DIR/basejump_stl
- $CI_PROJECT_DIR/bsg_manycore
- $CI_PROJECT_DIR/bsg_bladerunner
policy: pull
only:
refs:
- /^ci_.*$/
- master
retry: 2
7 changes: 6 additions & 1 deletion Makefile
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
.DEFAULT_GOAL = nothing
.PHONY: machines

nothing:

Expand All @@ -8,8 +9,12 @@ checkout_submodules:
git submodule update --init --recursive

machines:
make -C machines/
make -j 3 -C machines/

tools:
make -C software/riscv-tools checkout-all
make -C software/riscv-tools build-all

# helpful grep rule that allows you to skip large compiled riscv-tools and imports directories
%.grep:
grep -r "$*" --exclude-dir=imports --exclude-dir=riscv-tools
14 changes: 10 additions & 4 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -4,11 +4,11 @@ This repo contains the **bsg\_manycore** source code with contributions from the

The tile based architecture is designed for computing efficiency, scalability and generality. The two main components are:

* **Computing Node:** Purpose-designed RISC-V 32IM compatible core runs at 1.4GHz@16nm, but nodes also can be any other accelerators.
* **Computing Node:** Purpose-designed RISC-V 32IMF compatible core runs at 1.4GHz@16nm, but nodes also can be any other accelerators.
* **Mesh Network :** Dimension ordered, single flit network with inter-nodes synchronization primitives (mutex, barrier etc.)

Without any customized circuit, a 16nm prototype chip that holds 16x31 tiles on a 4.5x3.4 mm^2 die space achieves **812,350**
aggregated [CoreMark](https://www.eembc.org/coremark/) score.
Without any custom circuits, a 16nm prototype chip with 16x31 tiles on a 4.5x3.4 mm^2 die space achieves **812,350**
aggregated [CoreMark](https://www.eembc.org/coremark/) score, a world record. Many improvements have been made since this previous version.

# Documentation

Expand All @@ -24,12 +24,18 @@ aggregated [CoreMark](https://www.eembc.org/coremark/) score.

# Initial Setup for running programs

Above this directory:

- Checkout `basejump_stl`; cd into imports directory and type `make DRAMSim3`
- Checkout `bsg_cadenv`

In this directory:

- `make checkout_submodules`: To update all submodules in `imports/`.
- `make tools`: To install software toolchain required running programs on BSG Manycore.
- `make tools`: To install software toolchain required running programs on BSG Manycore. (This build uses 12-16 threads by default.)
- `make machines`: Compile simulation executables in `machines/`.
- Edit `BSG_MACHINE_PATH` in `software/mk/Makefile.paths` to choose the machine to run somd programs on.
- go into `software/spmd/bsg_barrier` and type `make` to run a test!

# Contributions

Expand Down
2 changes: 1 addition & 1 deletion ci/beebs.sh
Original file line number Diff line number Diff line change
Expand Up @@ -3,5 +3,5 @@
cd software/spmd/beebs

make clean
make -j 6 > /dev/null 2>&1
make -j 8 > /dev/null 2>&1
make check_finish
7 changes: 7 additions & 0 deletions ci/interrupt.sh
Original file line number Diff line number Diff line change
@@ -0,0 +1,7 @@
#~/bin/bash

cd software/spmd/interrupt_tests

make clean
make regress > /dev/null 2>&1
make summary
7 changes: 7 additions & 0 deletions machines/.gitignore
Original file line number Diff line number Diff line change
@@ -1,8 +1,15 @@
simv-debug
simv-debug.daidir
simv-profile
simv-profile.daidir
simv-debug
vc_hdrs.h
stack.info.*
*/build-profile
*/build-debug
*/build
*/csrc
*/csrc-debug
*/csrc-profile
*/*.tr
*/bsg_tag_boot_rom.v
23 changes: 0 additions & 23 deletions machines/16x8_crossbar/Makefile.machine.include

This file was deleted.

23 changes: 0 additions & 23 deletions machines/16x8_mesh/Makefile.machine.include

This file was deleted.

23 changes: 0 additions & 23 deletions machines/16x8_ruche/Makefile.machine.include

This file was deleted.

23 changes: 0 additions & 23 deletions machines/32x16_ruche/Makefile.machine.include

This file was deleted.

24 changes: 0 additions & 24 deletions machines/4x4_fast_fake/Makefile.machine.include

This file was deleted.

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