Replacing parameters with localparams (#606)

* parameter->localparam * Adding parameter to localparam inference * Minor adjustments * Purging unnecessary keywords * Reverting changes
bespoke-silicon-group · Nov 30, 2021 · 63ff81e · 63ff81e
1 parent 04c1d3d
commit 63ff81e
Show file tree

Hide file tree

Showing 57 changed files with 307 additions and 307 deletions.
diff --git a/v/bsg_cache_dma_to_wormhole.v b/v/bsg_cache_dma_to_wormhole.v
@@ -24,10 +24,10 @@ module bsg_cache_dma_to_wormhole
     , `BSG_INV_PARAM(wh_len_width_p)
     , `BSG_INV_PARAM(wh_cord_width_p)
 
-    , parameter data_len_lp = (vcache_data_width_p*vcache_block_size_in_words_p/vcache_dma_data_width_p)
+    , localparam data_len_lp = (vcache_data_width_p*vcache_block_size_in_words_p/vcache_dma_data_width_p)
 
-    , parameter dma_pkt_width_lp=`bsg_cache_dma_pkt_width(vcache_addr_width_p)
-    , parameter wh_link_sif_width_lp = 
+    , dma_pkt_width_lp=`bsg_cache_dma_pkt_width(vcache_addr_width_p)
+    , wh_link_sif_width_lp = 
       `bsg_ready_and_link_sif_width(wh_flit_width_p)
   )
   (

diff --git a/v/bsg_manycore_accel_default.v b/v/bsg_manycore_accel_default.v
@@ -8,7 +8,7 @@ module bsg_manycore_accel_default
      , `BSG_INV_PARAM(y_cord_width_p )
      , `BSG_INV_PARAM(pod_x_cord_width_p )
      , `BSG_INV_PARAM(pod_y_cord_width_p )
-     , parameter data_width_p   = 32
+     , `BSG_INV_PARAM(data_width_p   )
      , `BSG_INV_PARAM(addr_width_p   )
 
      , `BSG_INV_PARAM(icache_entries_p )
@@ -23,23 +23,23 @@ module bsg_manycore_accel_default
      , `BSG_INV_PARAM(num_tiles_x_p )
      , `BSG_INV_PARAM(num_tiles_y_p )
 
-     , parameter x_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_x_p)
-     , parameter y_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_y_p)
+     , localparam x_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_x_p)
+     , y_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_y_p)
 
      , `BSG_INV_PARAM(rev_fifo_els_p) // for FIFO credit counting.
      , `BSG_INV_PARAM(fwd_fifo_els_p) // for FIFO credit counting.
 
-     , parameter credit_counter_width_lp = `BSG_WIDTH(32)
+     , localparam credit_counter_width_lp = `BSG_WIDTH(32)
      , parameter proc_fifo_els_p = 4
-     , parameter debug_p = 1
+     , debug_p = 1
 
-     , parameter icache_addr_width_lp = `BSG_SAFE_CLOG2(icache_entries_p)
-     , parameter dmem_addr_width_lp = `BSG_SAFE_CLOG2(dmem_size_p)
-     , parameter pc_width_lp=(icache_addr_width_lp+icache_tag_width_p)
-     , parameter data_mask_width_lp=(data_width_p>>3)
-     , parameter reg_addr_width_lp=RV32_reg_addr_width_gp
+     , localparam icache_addr_width_lp = `BSG_SAFE_CLOG2(icache_entries_p)
+     , dmem_addr_width_lp = `BSG_SAFE_CLOG2(dmem_size_p)
+     , pc_width_lp=(icache_addr_width_lp+icache_tag_width_p)
+     , data_mask_width_lp=(data_width_p>>3)
+     , reg_addr_width_lp=RV32_reg_addr_width_gp
 
-     , parameter link_sif_width_lp =
+     , link_sif_width_lp =
       `bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
 
      )

diff --git a/v/bsg_manycore_endpoint.v b/v/bsg_manycore_endpoint.v
@@ -10,14 +10,14 @@ module bsg_manycore_endpoint
   #(`BSG_INV_PARAM(x_cord_width_p )
     , `BSG_INV_PARAM(y_cord_width_p )
     , `BSG_INV_PARAM(fifo_els_p )
-    , parameter data_width_p = 32
+    , `BSG_INV_PARAM(data_width_p )
     , `BSG_INV_PARAM(addr_width_p )
 
-    , parameter packet_width_lp = 
+    , localparam packet_width_lp = 
       `bsg_manycore_packet_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
-    , parameter return_packet_width_lp =
+    , return_packet_width_lp =
       `bsg_manycore_return_packet_width(x_cord_width_p,y_cord_width_p,data_width_p)
-    , parameter bsg_manycore_link_sif_width_lp =
+    , bsg_manycore_link_sif_width_lp =
       `bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
   )
   (

diff --git a/v/bsg_manycore_endpoint_fc.v b/v/bsg_manycore_endpoint_fc.v
@@ -17,24 +17,24 @@ module bsg_manycore_endpoint_fc
   #(`BSG_INV_PARAM(x_cord_width_p          )
     , `BSG_INV_PARAM(y_cord_width_p         )
     , `BSG_INV_PARAM(fifo_els_p             )
-    , parameter data_width_p           = 32
+    , `BSG_INV_PARAM(data_width_p           )
     , `BSG_INV_PARAM(addr_width_p           )
 
-    , parameter credit_counter_width_p = `BSG_WIDTH(32)
-    , parameter warn_out_of_credits_p  = 1
+    , credit_counter_width_p = `BSG_WIDTH(32)
+    , warn_out_of_credits_p  = 1
 
     // size of outgoing response fifo
-    , parameter rev_fifo_els_p         = 3
-    , parameter lg_rev_fifo_els_lp     = `BSG_WIDTH(rev_fifo_els_p)
+    , rev_fifo_els_p         = 3
+    , localparam lg_rev_fifo_els_lp     = `BSG_WIDTH(rev_fifo_els_p)
 
     // fwd fifo interface
     , parameter use_credits_for_local_fifo_p = 0
 
-    , parameter packet_width_lp =
+    , localparam packet_width_lp =
       `bsg_manycore_packet_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
-    , parameter return_packet_width_lp =
+    , return_packet_width_lp =
       `bsg_manycore_return_packet_width(x_cord_width_p,y_cord_width_p,data_width_p)
-    , parameter bsg_manycore_link_sif_width_lp =
+    , bsg_manycore_link_sif_width_lp =
       `bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
   )
   (

diff --git a/v/bsg_manycore_endpoint_standard.v b/v/bsg_manycore_endpoint_standard.v
@@ -30,24 +30,24 @@ module bsg_manycore_endpoint_standard
   #(`BSG_INV_PARAM(x_cord_width_p          )
     , `BSG_INV_PARAM(y_cord_width_p         )
     , `BSG_INV_PARAM(fifo_els_p             )
-    , parameter data_width_p           = 32
+    , `BSG_INV_PARAM(data_width_p           )
     , `BSG_INV_PARAM(addr_width_p           )
 
-    , parameter credit_counter_width_p = `BSG_WIDTH(32)
-    , parameter warn_out_of_credits_p  = 1
+    , credit_counter_width_p = `BSG_WIDTH(32)
+    , warn_out_of_credits_p  = 1
 
     // size of outgoing response fifo
-    , parameter rev_fifo_els_p         = 3
-    , parameter lg_rev_fifo_els_lp     = `BSG_WIDTH(rev_fifo_els_p)
+    , rev_fifo_els_p         = 3
+    , localparam lg_rev_fifo_els_lp     = `BSG_WIDTH(rev_fifo_els_p)
 
     // fwd fifo interface
     , parameter use_credits_for_local_fifo_p = 0
 
-    , parameter packet_width_lp =
+    , localparam packet_width_lp =
       `bsg_manycore_packet_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
-    , parameter return_packet_width_lp =
+    , return_packet_width_lp =
       `bsg_manycore_return_packet_width(x_cord_width_p,y_cord_width_p,data_width_p)
-    , parameter bsg_manycore_link_sif_width_lp =
+    , bsg_manycore_link_sif_width_lp =
       `bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
   )
   (

diff --git a/v/bsg_manycore_eva_to_npa.v b/v/bsg_manycore_eva_to_npa.v
@@ -29,10 +29,10 @@ module bsg_manycore_eva_to_npa
 
     , `BSG_INV_PARAM(num_tiles_x_p)
     , `BSG_INV_PARAM(num_tiles_y_p)
-    , parameter x_subcord_width_lp=`BSG_SAFE_CLOG2(num_tiles_x_p)
-    , parameter y_subcord_width_lp=`BSG_SAFE_CLOG2(num_tiles_y_p)
+    , localparam x_subcord_width_lp=`BSG_SAFE_CLOG2(num_tiles_x_p)
+    , y_subcord_width_lp=`BSG_SAFE_CLOG2(num_tiles_y_p)
 
-    , `BSG_INV_PARAM(num_vcache_rows_p )
+    , parameter `BSG_INV_PARAM(num_vcache_rows_p )
     , `BSG_INV_PARAM(vcache_block_size_in_words_p)  // block size in vcache
     , `BSG_INV_PARAM(vcache_size_p) // vcache capacity in words
     , `BSG_INV_PARAM(vcache_sets_p) // number of sets in vcache

diff --git a/v/bsg_manycore_gather_scatter.v b/v/bsg_manycore_gather_scatter.v
@@ -52,23 +52,23 @@ module bsg_manycore_gather_scatter
     , `BSG_INV_PARAM(num_tiles_x_p )
     , `BSG_INV_PARAM(num_tiles_y_p )
 
-    , parameter x_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_x_p)
-    , parameter y_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_y_p)
+    , localparam x_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_x_p)
+    , y_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_y_p)
 
-    , `BSG_INV_PARAM(rev_fifo_els_p) // for FIFO credit counting.
+    , parameter `BSG_INV_PARAM(rev_fifo_els_p) // for FIFO credit counting.
     , `BSG_INV_PARAM(fwd_fifo_els_p) // for FIFO credit counting.
 
-    , parameter credit_counter_width_lp = `BSG_WIDTH(32)
+    , localparam credit_counter_width_lp = `BSG_WIDTH(32)
     , parameter proc_fifo_els_p = 4
-    , parameter debug_p = 1
+    , debug_p = 1
 
-    , parameter icache_addr_width_lp = `BSG_SAFE_CLOG2(icache_entries_p)
-    , parameter dmem_addr_width_lp = `BSG_SAFE_CLOG2(dmem_size_p)
-    , parameter pc_width_lp=(icache_addr_width_lp+icache_tag_width_p)
-    , parameter data_mask_width_lp = (data_width_p>>3)
-    , parameter reg_addr_width_lp=RV32_reg_addr_width_gp
+    , localparam icache_addr_width_lp = `BSG_SAFE_CLOG2(icache_entries_p)
+    , dmem_addr_width_lp = `BSG_SAFE_CLOG2(dmem_size_p)
+    , pc_width_lp=(icache_addr_width_lp+icache_tag_width_p)
+    , data_mask_width_lp = (data_width_p>>3)
+    , reg_addr_width_lp=RV32_reg_addr_width_gp
 
-    , parameter link_sif_width_lp =
+    , link_sif_width_lp =
       `bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
   )
   (

diff --git a/v/bsg_manycore_hetero_socket.v b/v/bsg_manycore_hetero_socket.v
@@ -63,22 +63,22 @@ module bsg_manycore_hetero_socket
     , `BSG_INV_PARAM(icache_tag_width_p )
     , `BSG_INV_PARAM(num_vcache_rows_p )
     , `BSG_INV_PARAM(vcache_size_p )
-    , parameter debug_p = 0
-    , parameter int hetero_type_p = 0
+    , debug_p = 0
+    , int hetero_type_p = 0
     , `BSG_INV_PARAM(pod_x_cord_width_p)
     , `BSG_INV_PARAM(pod_y_cord_width_p)
     , `BSG_INV_PARAM(num_tiles_x_p)
     , `BSG_INV_PARAM(num_tiles_y_p)
-    , parameter x_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_x_p)
-    , parameter y_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_y_p)
-    , `BSG_INV_PARAM(vcache_block_size_in_words_p)
+    , localparam x_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_x_p)
+    , y_subcord_width_lp = `BSG_SAFE_CLOG2(num_tiles_y_p)
+    , parameter `BSG_INV_PARAM(vcache_block_size_in_words_p)
     , `BSG_INV_PARAM(vcache_sets_p)
     , `BSG_INV_PARAM(fwd_fifo_els_p )
     , `BSG_INV_PARAM(rev_fifo_els_p )
     , `BSG_INV_PARAM(barrier_dirs_p )
-    , parameter barrier_lg_dirs_lp=`BSG_SAFE_CLOG2(barrier_dirs_p+1)
+    , localparam barrier_lg_dirs_lp=`BSG_SAFE_CLOG2(barrier_dirs_p+1)
 
-    , parameter bsg_manycore_link_sif_width_lp =
+    , bsg_manycore_link_sif_width_lp =
       `bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
   )
   (

diff --git a/v/bsg_manycore_hor_io_router.v b/v/bsg_manycore_hor_io_router.v
@@ -25,18 +25,18 @@ module bsg_manycore_hor_io_router
 
     , `BSG_INV_PARAM(tieoff_west_p)
     , `BSG_INV_PARAM(tieoff_east_p)
-    , parameter tieoff_proc_p=0
+    , tieoff_proc_p=0
 
-    , parameter dims_lp=3 // only support 3
+    , localparam dims_lp=3 // only support 3
 
     , parameter fwd_use_credits_p = 7'b0000000
-    , parameter int fwd_fifo_els_p[dims_lp*2:0] = '{2,2,2,2,2,2,2}
-    , parameter rev_use_credits_p = 7'b0000000
-    , parameter int rev_fifo_els_p[dims_lp*2:0] = '{2,2,2,2,2,2,2}
+    , int fwd_fifo_els_p[dims_lp*2:0] = '{2,2,2,2,2,2,2}
+    , rev_use_credits_p = 7'b0000000
+    , int rev_fifo_els_p[dims_lp*2:0] = '{2,2,2,2,2,2,2}
 
-    , parameter link_sif_width_lp =
+    , localparam link_sif_width_lp =
       `bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
-    , parameter ruche_x_link_sif_width_lp =
+    , ruche_x_link_sif_width_lp =
       `bsg_manycore_ruche_x_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
   )
   ( 

diff --git a/v/bsg_manycore_hor_io_router_column.v b/v/bsg_manycore_hor_io_router_column.v
@@ -21,9 +21,9 @@ module bsg_manycore_hor_io_router_column
     , `BSG_INV_PARAM(bit [num_row_p-1:0] tieoff_east_p )
 
 
-    , parameter link_sif_width_lp =
+    , localparam link_sif_width_lp =
       `bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
-    , parameter ruche_x_link_sif_width_lp =
+    , localparam ruche_x_link_sif_width_lp =
       `bsg_manycore_ruche_x_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
   )
   (

diff --git a/v/bsg_manycore_link_async_to_wormhole.v b/v/bsg_manycore_link_async_to_wormhole.v
@@ -22,18 +22,18 @@ module bsg_manycore_link_async_to_wormhole
 
   // Wormhole link parameters
   ,`BSG_INV_PARAM(flit_width_p                     )
-  ,parameter dims_p                           = 2
-  ,parameter int cord_markers_pos_p[dims_p:0] = '{5, 4, 0}
+  ,dims_p                           = 2
+  ,int cord_markers_pos_p[dims_p:0] = '{5, 4, 0}
   ,`BSG_INV_PARAM(len_width_p                      )
 
   // The number of registers between reset_i and reset sinks.
-  ,parameter mc_reset_depth_p = 3
+  ,mc_reset_depth_p = 3
 
   ,localparam num_nets_lp = 2
-  ,localparam bsg_manycore_link_sif_width_lp = `bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
-  ,localparam bsg_ready_and_link_sif_width_lp = `bsg_ready_and_link_sif_width(flit_width_p)
+  ,bsg_manycore_link_sif_width_lp = `bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
+  ,bsg_ready_and_link_sif_width_lp = `bsg_ready_and_link_sif_width(flit_width_p)
 
-  ,localparam cord_width_lp = cord_markers_pos_p[dims_p]
+  ,cord_width_lp = cord_markers_pos_p[dims_p]
   )
 
   (// Manycore side

diff --git a/v/bsg_manycore_link_sif_async_buffer.v b/v/bsg_manycore_link_sif_async_buffer.v
@@ -10,12 +10,12 @@
 
 module bsg_manycore_link_sif_async_buffer
   import bsg_manycore_pkg::*;
-   #(   addr_width_p  = 32
-      , data_width_p  = 32
+   #(   `BSG_INV_PARAM(addr_width_p  )
+      , `BSG_INV_PARAM(data_width_p  )
       , `BSG_INV_PARAM(x_cord_width_p)
       , `BSG_INV_PARAM(y_cord_width_p)
       , fifo_els_p    = 2
-      , bsg_manycore_link_sif_width_lp = `bsg_manycore_link_sif_width(addr_width_p, data_width_p, x_cord_width_p, y_cord_width_p)
+      , localparam bsg_manycore_link_sif_width_lp = `bsg_manycore_link_sif_width(addr_width_p, data_width_p, x_cord_width_p, y_cord_width_p)
     )(
     //the left side signal
     input                                       L_clk_i

diff --git a/v/bsg_manycore_link_sif_tieoff.v b/v/bsg_manycore_link_sif_tieoff.v
@@ -14,7 +14,7 @@ module bsg_manycore_link_sif_tieoff
     , `BSG_INV_PARAM(data_width_p )
     , `BSG_INV_PARAM(x_cord_width_p )
     , `BSG_INV_PARAM(y_cord_width_p )
-    , parameter link_sif_width_lp =
+    , localparam link_sif_width_lp =
     `bsg_manycore_link_sif_width(addr_width_p, data_width_p, x_cord_width_p, y_cord_width_p)
   )
   (

diff --git a/v/bsg_manycore_link_to_cache.v b/v/bsg_manycore_link_to_cache.v
@@ -20,21 +20,21 @@ module bsg_manycore_link_to_cache
     , `BSG_INV_PARAM(ways_p)
     , `BSG_INV_PARAM(block_size_in_words_p)
 
-    , parameter fifo_els_p=4
-
-    , parameter lg_sets_lp=`BSG_SAFE_CLOG2(sets_p)
-    , parameter lg_ways_lp=`BSG_SAFE_CLOG2(ways_p)
-    , parameter word_offset_width_lp=`BSG_SAFE_CLOG2(block_size_in_words_p)
-    , parameter data_mask_width_lp=(data_width_p>>3)
-    , parameter byte_offset_width_lp=`BSG_SAFE_CLOG2(data_width_p>>3)
-    , parameter cache_addr_width_lp=(link_addr_width_p-1+byte_offset_width_lp) 
-    , parameter block_offset_width_lp=(word_offset_width_lp+byte_offset_width_lp)
+    , fifo_els_p=4
+
+    , localparam lg_sets_lp=`BSG_SAFE_CLOG2(sets_p)
+    , lg_ways_lp=`BSG_SAFE_CLOG2(ways_p)
+    , word_offset_width_lp=`BSG_SAFE_CLOG2(block_size_in_words_p)
+    , data_mask_width_lp=(data_width_p>>3)
+    , byte_offset_width_lp=`BSG_SAFE_CLOG2(data_width_p>>3)
+    , cache_addr_width_lp=(link_addr_width_p-1+byte_offset_width_lp) 
+    , block_offset_width_lp=(word_offset_width_lp+byte_offset_width_lp)
 
-    , parameter link_sif_width_lp=
+    , link_sif_width_lp=
       `bsg_manycore_link_sif_width(link_addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
-    , parameter bsg_cache_pkt_width_lp=
+    , bsg_cache_pkt_width_lp=
       `bsg_cache_pkt_width(cache_addr_width_lp,data_width_p)
-    , parameter manycore_packet_width_lp=
+    , manycore_packet_width_lp=
       `bsg_manycore_packet_width(link_addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
   )
   (

diff --git a/v/bsg_manycore_link_to_cache_non_blocking.v b/v/bsg_manycore_link_to_cache_non_blocking.v
@@ -15,20 +15,20 @@ module bsg_manycore_link_to_cache_non_blocking
     , `BSG_INV_PARAM(x_cord_width_p)
     , `BSG_INV_PARAM(y_cord_width_p)
 
-    , parameter link_sif_width_lp=
+    , localparam link_sif_width_lp=
       `bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
 
     // cache parmeters
-    , `BSG_INV_PARAM(sets_p)
+    , parameter `BSG_INV_PARAM(sets_p)
     , `BSG_INV_PARAM(ways_p)
     , `BSG_INV_PARAM(block_size_in_words_p)
     , `BSG_INV_PARAM(miss_fifo_els_p)
 
-    , parameter byte_offset_width_lp=`BSG_SAFE_CLOG2(data_width_p>>3)
-    , parameter cache_addr_width_lp=(addr_width_p-1+byte_offset_width_lp)
+    , byte_offset_width_lp=`BSG_SAFE_CLOG2(data_width_p>>3)
+    , cache_addr_width_lp=(addr_width_p-1+byte_offset_width_lp)
 
-    , parameter id_width_lp=(x_cord_width_p+y_cord_width_p+5+2)
-    , parameter cache_pkt_width_lp=
+    , id_width_lp=(x_cord_width_p+y_cord_width_p+5+2)
+    , cache_pkt_width_lp=
       `bsg_cache_non_blocking_pkt_width(id_width_lp,cache_addr_width_lp,data_width_p)
   )
   (

diff --git a/v/bsg_manycore_link_to_fifo.v b/v/bsg_manycore_link_to_fifo.v
@@ -17,15 +17,15 @@ module  bsg_manycore_link_to_fifo
     , `BSG_INV_PARAM(y_cord_width_p)
 
     //The output fifo width must be multiple times of data_width_p
-    , parameter out_fifo_width_scale_p  = 2
+    , out_fifo_width_scale_p  = 2
     //multiple channel are merged to increase the output bandwidth
-    , parameter in_channel_scale_p      = 2
-    , parameter fifo_els_p              = 4
+    , in_channel_scale_p      = 2
+    , fifo_els_p              = 4
 
-    , parameter bsg_manycore_link_sif_width_lp=`bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
-    , parameter link_sif_num_lp     = in_channel_scale_p * out_fifo_width_scale_p
-    , parameter out_fifo_width_lp   = data_width_p       * out_fifo_width_scale_p
-    , parameter debug_lp            = 0
+    , localparam bsg_manycore_link_sif_width_lp=`bsg_manycore_link_sif_width(addr_width_p,data_width_p,x_cord_width_p,y_cord_width_p)
+    , link_sif_num_lp     = in_channel_scale_p * out_fifo_width_scale_p
+    , out_fifo_width_lp   = data_width_p       * out_fifo_width_scale_p
+    , debug_lp            = 0
     )
   (