Change xxx->prog_modes & PM_ABCD to is_abcd(xxx)

src/avr.c

@@ -52,7 +52,7 @@ int avr_tpi_chip_erase(const PROGRAMMER *pgm, const AVRPART *p) {
   int err;
   AVRMEM *mem;
 
-  if(p->prog_modes & PM_TPI) {
+  if(is_tpi(p)) {
     led_clr(pgm, LED_ERR);
     led_set(pgm, LED_PGM);
 
@@ -107,7 +107,7 @@ int avr_tpi_program_enable(const PROGRAMMER *pgm, const AVRPART *p, unsigned cha
   unsigned char cmd[2];
   unsigned char response;
 
-  if(p->prog_modes & PM_TPI) {
+  if(is_tpi(p)) {
     // Set guard time
     cmd[0] = (TPI_CMD_SSTCS | TPI_REG_TPIPCR);
     cmd[1] = guard_time;
@@ -230,7 +230,7 @@ int avr_read_byte_default(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM
   led_clr(pgm, LED_ERR);
   led_set(pgm, LED_PGM);
 
-  if(p->prog_modes & PM_TPI) {
+  if(is_tpi(p)) {
     if(pgm->cmd_tpi == NULL) {
       pmsg_error("%s programmer does not support TPI\n", pgm->type);
       goto error;
@@ -377,7 +377,7 @@ int avr_read_mem(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *mem, con
   memset(mem->buf, 0xff, mem->size);
 
   // Supports paged load thru post-increment
-  if((p->prog_modes & PM_TPI) && mem->page_size > 1 && mem->size%mem->page_size == 0 && pgm->cmd_tpi != NULL) {
+  if(is_tpi(p) && mem->page_size > 1 && mem->size%mem->page_size == 0 && pgm->cmd_tpi != NULL) {
 
     while(avr_tpi_poll_nvmbsy(pgm))
       continue;
@@ -412,7 +412,7 @@ int avr_read_mem(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *mem, con
   }
   // HW programmers need a page size > 1, bootloader typ only offer paged r/w
   if((pgm->paged_load && mem->page_size > 1 && mem->size%mem->page_size == 0) ||
-    ((pgm->prog_modes & PM_SPM) && avr_has_paged_access(pgm, p, mem))) {
+    (is_spm(pgm) && avr_has_paged_access(pgm, p, mem))) {
     // The programmer supports a paged mode read
     int need_read, failure;
     unsigned int pageaddr;
@@ -664,7 +664,7 @@ int avr_write_byte_default(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM
 
   data = avr_bitmask_data(pgm, p, mem, addr, data);
 
-  if(p->prog_modes & PM_TPI) {
+  if(is_tpi(p)) {
     if(pgm->cmd_tpi == NULL) {
       pmsg_error("%s programmer does not support TPI\n", pgm->type);
       goto error;
@@ -939,7 +939,7 @@ int avr_write_mem(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m, int
     return wsize;
   }
 
-  if((p->prog_modes & PM_TPI) && m->page_size > 1 && pgm->cmd_tpi) {
+  if(is_tpi(p) && m->page_size > 1 && pgm->cmd_tpi) {
     unsigned int chunk;         // Number of words for each write command
     unsigned int j, writeable_chunk;
 
@@ -1013,7 +1013,7 @@ int avr_write_mem(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m, int
   }
   // HW programmers need a page size > 1, bootloader typ only offer paged r/w
   if((pgm->paged_load && m->page_size > 1 && m->size%m->page_size == 0) ||
-    ((pgm->prog_modes & PM_SPM) && avr_has_paged_access(pgm, p, m))) {
+    (is_spm(pgm) && avr_has_paged_access(pgm, p, m))) {
 
     // The programmer supports a paged mode write
     int need_write, failure, nset;
@@ -1039,7 +1039,7 @@ int avr_write_mem(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m, int
     AVRMEM *cm = avr_dup_mem(m);
 
     // Establish and sanity check effective page size
-    int pgsize = (pgm->prog_modes & PM_SPM) && p->n_page_erase > 0? p->n_page_erase*cm->page_size: cm->page_size;
+    int pgsize = is_spm(pgm) && p->n_page_erase > 0? p->n_page_erase*cm->page_size: cm->page_size;
 
     if((pgsize & (pgsize - 1)) || pgsize < 1) {
       pmsg_error("effective page size %d implausible\n", pgsize);
@@ -1216,7 +1216,7 @@ int avr_mem_bitmask(const AVRPART *p, const AVRMEM *mem, int addr) {
   int bitmask = mem->bitmask;
 
   // Collective memory fuses will have a different bitmask for each address (ie, fuse)
-  if(mem_is_fuses(mem) && addr >= 0 && addr < 16) {     // Get right fuse in fuses memory
+  if(mem_is_fuses(mem) && addr >= 0 && addr < 16) { // Get right fuse in fuses memory
     AVRMEM *dfuse = avr_locate_fuse_by_offset(p, addr);
 
     if(dfuse) {
@@ -1306,7 +1306,7 @@ int avr_verify_mem(const PROGRAMMER *pgm, const AVRPART *p, const AVRPART *v, co
 
   for(i = 0; i < size; i++) {
     if((b->tags[i] & TAG_ALLOCATED) != 0 && buf1[i] != buf2[i]) {
-      uint8_t bitmask = p->prog_modes & PM_ISP? get_fuse_bitmask(a): avr_mem_bitmask(p, a, i);
+      uint8_t bitmask = is_isp(p)? get_fuse_bitmask(a): avr_mem_bitmask(p, a, i);
 
       if(ro || (pgm->readonly && pgm->readonly(pgm, p, a, i))) {
         if(quell_progress < 2) {
@@ -1555,7 +1555,7 @@ Memtable avr_mem_order[100] = {
 
 // Whether a memory is an exception that shouldn't be there for this particular i/face
 int avr_mem_exclude(const PROGRAMMER *pgm, const AVRPART *p, const AVRMEM *m) {
-  return is_type(pgm, dryrun)? 0:     // Never exclude dryrun memories
+  return is_type(pgm, dryrun)? 0: // Never exclude dryrun memories
     // debugWIRE only allows eeprom/flash/signature
     (both_debugwire(pgm, p) && !(mem_is_in_flash(m) || mem_is_eeprom(m) || mem_is_signature(m))) ||
     // urclock type only allows eeprom/flash/signature

src/avr_opcodes.c

@@ -667,7 +667,7 @@ int op16_is_benign(int op16, int avrlevel) {    // Benign means no I/O or SRAM i
 // Opcodes in avr_opcodes[] that a part ought to be able to run
 int avr_get_archlevel(const AVRPART *p) {
   int ret =
-    p->prog_modes & PM_UPDI? PART_AVR_XT: p->prog_modes & PM_PDI? PART_AVR_XM: p->prog_modes & PM_TPI? PART_AVR_RC: 0;
+    is_updi(p)? PART_AVR_XT: is_pdi(p)? PART_AVR_XM: is_tpi(p)? PART_AVR_RC: 0;
 
   if(!ret) {                    // Non-TPI classic part
     switch(p->archnum) {
@@ -717,7 +717,7 @@ int avr_get_archlevel(const AVRPART *p) {
 
 // Index in the avr_opcodes[].clock[] array for timings of an opcode
 AVR_cycle_index avr_get_cycle_index(const AVRPART *p) {
-  return p->prog_modes & PM_UPDI? OP_AVRxt: p->prog_modes & PM_PDI? OP_AVRxm: p->prog_modes & PM_TPI? OP_AVRrc: OP_AVRe;
+  return is_updi(p)? OP_AVRxt: is_pdi(p)? OP_AVRxm: is_tpi(p)? OP_AVRrc: OP_AVRe;
 }
 
 // Return the mnemonic string of an opcode

src/avrcache.c

@@ -76,7 +76,7 @@
  * avr_chip_erase_cached() erases the chip and discards pending writes() to
  * flash or EEPROM. It presets the flash cache to all 0xff alleviating the
  * need to read from the device flash. However, if the programmer serves
- * bootloaders (pgm->prog_modes & PM_SPM) then the flash cache is reset
+ * bootloaders is_spm(pgm) then the flash cache is reset
  * instead, necessitating flash memory be fetched from the device on first
  * read; the reason for this is that bootloaders emulate chip erase and they
  * won't overwrite themselves (some bootloaders, eg, optiboot ignore chip
@@ -269,7 +269,7 @@ static int initCache(AVR_Cache *cp, const PROGRAMMER *pgm, const AVRPART *p) {
   cp->copy = mmt_malloc(cp->size);
   cp->iscached = mmt_malloc(cp->size/cp->page_size);
 
-  if((pgm->prog_modes & PM_SPM) && mem_is_in_flash(basemem)) {  // Could be vector bootloader
+  if(is_spm(pgm) && mem_is_in_flash(basemem)) {  // Could be vector bootloader
     // Caching the vector page hands over to the progammer that then can patch the reset vector
     if(loadCachePage(cp, pgm, p, basemem, 0, 0, 0) < 0)
       return LIBAVRDUDE_GENERAL_FAILURE;
@@ -329,7 +329,7 @@ static int guessBootStart(const PROGRAMMER *pgm, const AVRPART *p) {
   int bootstart = 0;
   const AVR_Cache *cp = pgm->cp_flash;
 
-  if(p->prog_modes & PM_UPDI)   // Modern AVRs put the bootloader at 0
+  if(is_updi(p))   // Modern AVRs put the bootloader at 0
     return 0;
 
   if(p->n_boot_sections > 0 && p->boot_section_size > 0)
@@ -512,8 +512,8 @@ int avr_flush_cache(const PROGRAMMER *pgm, const AVRPART *p) {
         continue;
 
       if(mems[i].isflash) {
-        memset(cp->copy, 0xff, cp->size);       // Record device memory as erased
-        if(pgm->prog_modes & PM_SPM) {  // Bootloaders will not overwrite themselves
+        memset(cp->copy, 0xff, cp->size); // Record device memory as erased
+        if(is_spm(pgm)) {       // Bootloaders will not overwrite themselves
           // Read back generously estimated bootloader section to avoid verification errors
           int bootstart = guessBootStart(pgm, p);
           int nbo = (cp->size - bootstart)/cp->page_size;
@@ -532,7 +532,7 @@ int avr_flush_cache(const PROGRAMMER *pgm, const AVRPART *p) {
       } else if(mems[i].iseeprom) {
         // Don't know whether chip erase has zapped EEPROM
         for(int n = 0; n < cp->size; n += cp->page_size) {
-          if(!is_memset(cp->copy + n, 0xff, cp->page_size)) {   // First page that had EEPROM data
+          if(!is_memset(cp->copy + n, 0xff, cp->page_size)) { // First page that had EEPROM data
             if(avr_read_page_default(pgm, p, mem, n, cp->copy + n) < 0) {
               report_progress(1, -1, NULL);
               if(quell_progress)
@@ -714,7 +714,7 @@ int avr_chip_erase_cached(const PROGRAMMER *pgm, const AVRPART *p) {
         return LIBAVRDUDE_GENERAL_FAILURE;
 
     if(mems[i].isflash) {
-      if(pgm->prog_modes & PM_SPM) {    // Reset cache to unknown
+      if(is_spm(pgm)) {         // Reset cache to unknown
         memset(cp->iscached, 0, cp->size/cp->page_size);
       } else {                  // Preset all pages as erased
         memset(cp->copy, 0xff, cp->size);
@@ -726,7 +726,7 @@ int avr_chip_erase_cached(const PROGRAMMER *pgm, const AVRPART *p) {
 
       for(int pgno = 0, n = 0; n < cp->size; pgno++, n += cp->page_size) {
         if(cp->iscached[pgno]) {
-          if(!is_memset(cp->copy + n, 0xff, cp->page_size)) {   // Page has data?
+          if(!is_memset(cp->copy + n, 0xff, cp->page_size)) { // Page has data?
             if(avr_read_page_default(pgm, p, mem, n, cp->copy + n) < 0)
               return LIBAVRDUDE_GENERAL_FAILURE;
             erased = is_memset(cp->copy + n, 0xff, cp->page_size);

src/avrftdi.c

@@ -232,7 +232,7 @@ static void avrftdi_enable(PROGRAMMER *pgm, const AVRPART *p) {
   set_pin(pgm, PPI_AVR_BUFF, ON);
 
   // Switch to TPI initialisation in avrftdi_tpi.c
-  if(p->prog_modes & PM_TPI)
+  if(is_tpi(p))
     avrftdi_tpi_initpgm(pgm);
 }
 
@@ -784,7 +784,7 @@ static void avrftdi_close(PROGRAMMER *pgm) {
 static int avrftdi_initialize(const PROGRAMMER *pgm, const AVRPART *p) {
   avrftdi_powerup(pgm);
 
-  if(p->prog_modes & PM_TPI) {
+  if(is_tpi(p)) {
     // See avrftdi_tpi.c
     avrftdi_tpi_initialize(pgm, p);
   } else {

src/bitbang.c

@@ -372,7 +372,7 @@ int bitbang_chip_erase(const PROGRAMMER *pgm, const AVRPART *p) {
   unsigned char res[4];
   AVRMEM *mem;
 
-  if(p->prog_modes & PM_TPI) {
+  if(is_tpi(p)) {
 
     while(avr_tpi_poll_nvmbsy(pgm));
 
@@ -421,7 +421,7 @@ int bitbang_program_enable(const PROGRAMMER *pgm, const AVRPART *p) {
   unsigned char res[4];
   int i;
 
-  if(p->prog_modes & PM_TPI) {
+  if(is_tpi(p)) {
     // Enable NVM programming
     bitbang_tpi_tx(pgm, TPI_CMD_SKEY);
     for(i = sizeof(tpi_skey) - 1; i >= 0; i--)
@@ -460,7 +460,7 @@ int bitbang_initialize(const PROGRAMMER *pgm, const AVRPART *p) {
   usleep(20000);
 
   // TPIDATA is a single line, so SDI & SDO should be connected
-  if(p->prog_modes & PM_TPI) {
+  if(is_tpi(p)) {
     // Make sure cmd_tpi() is defined
     if(pgm->cmd_tpi == NULL) {
       pmsg_error("%s programmer does not support TPI\n", pgm->type);
@@ -494,7 +494,7 @@ int bitbang_initialize(const PROGRAMMER *pgm, const AVRPART *p) {
   pgm->setpin(pgm, PIN_AVR_RESET, 0);
   usleep(20000);
 
-  if(p->prog_modes & PM_TPI) {
+  if(is_tpi(p)) {
     // Keep TPIDATA high for 16 clock cycles
     pgm->setpin(pgm, PIN_AVR_SDO, 1);
     for(i = 0; i < 16; i++)

src/config.c

@@ -1033,7 +1033,7 @@ void cfg_update_mcuid(AVRPART *part) {
     return;
 
   // Don't assign an mcuid for 32-bit AVR parts
-  if(part->prog_modes & PM_aWire)
+  if(is_awire(part))
     return;
 
   // Find an entry that shares the same name, overwrite mcuid with known, existing mcuid

src/developer_opts.c

@@ -1201,15 +1201,15 @@ void dev_output_part_defs(char *partdesc) {
     }
     // Print wait delays for AVR family parts
     if(waits) {
-      if(p->prog_modes & PM_ISP)
+      if(is_isp(p))
         dev_info(".wd_chip_erase %.3f ms %s\n", p->chip_erase_delay/1000.0, p->desc);
       if(p->mem) {
         for(LNODEID lnm = lfirst(p->mem); lnm; lnm = lnext(lnm)) {
           AVRMEM *m = ldata(lnm);
 
           // Write delays not needed for read-only calibration and signature memories
           if(!mem_is_readonly(m)) {
-            if(p->prog_modes & PM_ISP) {
+            if(is_isp(p)) {
               if(m->min_write_delay == m->max_write_delay)
                 dev_info(".wd_%s %.3f ms %s\n", m->desc, m->min_write_delay/1000.0, p->desc);
               else {