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aarch64: ADD FEAT_THE RCWCAS instructions.
This patch adds support for FEAT_THE doubleword and quadword instructions. doubleword insturctions are enabled by "+the" flag whereas quadword instructions are enabled on passing both "+the and +d128" flags. Support for following sets of instructions is added in this patch. Read check write compare and swap doubleword: (rcwcas, rcwcasa, rcwcasal, rcwcasl) Read check write compare and swap quadword: (rcwcasp,rcwcaspa, rcwcaspal, rcwcaspl) Read check write software compare and swap doubleword: (rcwscas, rcwscasa, rcwscasal, rcwscasl) Read check write software compare and swap quadword: (rcwscasp, rcwscaspa, rcwscaspal, rcwscaspl) Read check write atomic bit clear on doubleword: (rcwclr, rcwclra, rcwclral, rcwclrl) Read check write atomic bit clear on quadword: (rcwclrp, rcwclrpa, rcwclrpal, rcwclrpl) Read check write software atomic bit clear on doubleword: (rcwsclr, rcwsclra, rcwsclral, rcwsclrl) Read check write software atomic bit clear on quadword: (rcwsclrp,rcwsclrpa, rcwsclrpal,rcwsclrpl) Read check write atomic bit set on doubleword: (rcwset,rcwseta, rcwsetal,rcwsetl) Read check write atomic bit set on quadword: (rcwsetp,rcwsetpa,rcwsetpal,rcwsetpl) Read check write software atomic bit set on doubleword: (rcwsset,rcwsseta,rcwssetal,rcwssetl) Read check write software atomic bit set on quadword: (rcwssetp,rcwssetpa,rcwssetpal,rcwssetpl) Read check write swap doubleword: (rcwswp,rcwswpa,rcwswpal,rcwswpl) Read check write swap quadword: (rcwswpp,rcwswppa, rcwswppal,rcwswppl) Read check write software swap doubleword: (rcwsswp,rcwsswpa,rcwsswpal,rcwsswpl) Read check write software swap quadword: (rcwsswpp,rcwsswppa,rcwsswppal,rcwsswppl)
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| @@ -0,0 +1,42 @@ | ||
| #name: Test of FEAT_THE quadword Instructions. | ||
| #as: -march=armv9.4-a+the+d128 | ||
| #objdump: -dr | ||
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| [^:]+: file format .* | ||
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| [^:]+: | ||
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| [^:]+: | ||
| .*: 19200e04 rcwcasp x0, x1, x4, x5, \[x16\] | ||
| .*: 19a00e04 rcwcaspa x0, x1, x4, x5, \[x16\] | ||
| .*: 19e00e04 rcwcaspal x0, x1, x4, x5, \[x16\] | ||
| .*: 19600e04 rcwcaspl x0, x1, x4, x5, \[x16\] | ||
| .*: 59200e04 rcwscasp x0, x1, x4, x5, \[x16\] | ||
| .*: 59a00e04 rcwscaspa x0, x1, x4, x5, \[x16\] | ||
| .*: 59e00e04 rcwscaspal x0, x1, x4, x5, \[x16\] | ||
| .*: 59600e04 rcwscaspl x0, x1, x4, x5, \[x16\] | ||
| .*: 19259200 rcwclrp x0, x5, \[x16\] | ||
| .*: 19a59200 rcwclrpa x0, x5, \[x16\] | ||
| .*: 19e59200 rcwclrpal x0, x5, \[x16\] | ||
| .*: 19659200 rcwclrpl x0, x5, \[x16\] | ||
| .*: 59259200 rcwsclrp x0, x5, \[x16\] | ||
| .*: 59a59200 rcwsclrpa x0, x5, \[x16\] | ||
| .*: 59e59200 rcwsclrpal x0, x5, \[x16\] | ||
| .*: 59659200 rcwsclrpl x0, x5, \[x16\] | ||
| .*: 1925a200 rcwswpp x0, x5, \[x16\] | ||
| .*: 19a5a200 rcwswppa x0, x5, \[x16\] | ||
| .*: 19e5a200 rcwswppal x0, x5, \[x16\] | ||
| .*: 1965a200 rcwswppl x0, x5, \[x16\] | ||
| .*: 5925a200 rcwsswpp x0, x5, \[x16\] | ||
| .*: 59a5a200 rcwsswppa x0, x5, \[x16\] | ||
| .*: 59e5a200 rcwsswppal x0, x5, \[x16\] | ||
| .*: 5965a200 rcwsswppl x0, x5, \[x16\] | ||
| .*: 1925b200 rcwsetp x0, x5, \[x16\] | ||
| .*: 19a5b200 rcwsetpa x0, x5, \[x16\] | ||
| .*: 19e5b200 rcwsetpal x0, x5, \[x16\] | ||
| .*: 1965b200 rcwsetpl x0, x5, \[x16\] | ||
| .*: 5925b200 rcwssetp x0, x5, \[x16\] | ||
| .*: 59a5b200 rcwssetpa x0, x5, \[x16\] | ||
| .*: 59e5b200 rcwssetpal x0, x5, \[x16\] | ||
| .*: 5965b200 rcwssetpl x0, x5, \[x16\] |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,7 @@ | ||
| .text | ||
| .irp op casp, caspa, caspal, caspl, scasp, scaspa, scaspal, scaspl | ||
| rcw\op x0, x1, x4, x5, [x16] | ||
| .endr | ||
| .irp op clrp, clrpa, clrpal, clrpl, sclrp, sclrpa, sclrpal, sclrpl, swpp, swppa, swppal, swppl, sswpp, sswppa, sswppal, sswppl, setp, setpa, setpal, setpl, ssetp, ssetpa, ssetpal, ssetpl | ||
| rcw\op x0, x5, [x16] | ||
| .endr |
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| @@ -0,0 +1,4 @@ | ||
| #name: Test of illegal FEAT_THE quadword Instructions. | ||
| #as: -march=armv9.4-a+the | ||
| #source: d128_the-1.s | ||
| #error_output: d128_the-bad-1.l |
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| @@ -0,0 +1,33 @@ | ||
| [^ :]+: Assembler messages: | ||
| .*: Error: selected processor does not support `rcwcasp x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwcaspa x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwcaspal x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwcaspl x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscasp x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscaspa x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscaspal x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscaspl x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrpl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrpl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswpp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswppa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswppal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswppl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswpp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswppa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswppal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswppl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetpl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetpl x0,x5,\[x16\]' |
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| @@ -0,0 +1,4 @@ | ||
| #name: Test of illegal FEAT_D128 quadword Instructions. | ||
| #as: -march=armv9.4-a+d128 | ||
| #source: d128_the-1.s | ||
| #error_output: d128_the-bad-2.l |
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,33 @@ | ||
| [^ :]+: Assembler messages: | ||
| .*: Error: selected processor does not support `rcwcasp x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwcaspa x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwcaspal x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwcaspl x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscasp x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscaspa x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscaspal x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscaspl x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrpl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrpl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswpp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswppa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswppal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswppl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswpp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswppa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswppal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswppl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetpl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetpl x0,x5,\[x16\]' |
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| @@ -0,0 +1,4 @@ | ||
| #name: Test of illegal quadword Instructions. | ||
| #as: -march=armv9.4-a | ||
| #source: d128_the-1.s | ||
| #error_output: d128_the-bad-3.l |
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,33 @@ | ||
| [^ :]+: Assembler messages: | ||
| .*: Error: selected processor does not support `rcwcasp x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwcaspa x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwcaspal x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwcaspl x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscasp x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscaspa x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscaspal x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwscaspl x0,x1,x4,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwclrpl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsclrpl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswpp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswppa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswppal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwswppl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswpp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswppa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswppal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsswppl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwsetpl x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetp x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetpa x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetpal x0,x5,\[x16\]' | ||
| .*: Error: selected processor does not support `rcwssetpl x0,x5,\[x16\]' |
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| @@ -0,0 +1,4 @@ | ||
| #name: Test of FEAT_THE Instructions wrong operands. | ||
| #as: -march=armv9.4-a+d128+the | ||
| #source: d128_the-bad.s | ||
| #error_output: d128_the-bad-4.l |
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| Original file line number | Diff line number | Diff line change |
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| @@ -0,0 +1,65 @@ | ||
| [^ :]+: Assembler messages: | ||
| .*: Error: reg pair must start from even reg at operand 1 -- `rcwcasp x1,x2,x4,x5,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 3 -- `rcwcasp x0,x1,x5,x6,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 1 -- `rcwcaspa x1,x2,x4,x5,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 3 -- `rcwcaspa x0,x1,x5,x6,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 1 -- `rcwcaspal x1,x2,x4,x5,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 3 -- `rcwcaspal x0,x1,x5,x6,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 1 -- `rcwcaspl x1,x2,x4,x5,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 3 -- `rcwcaspl x0,x1,x5,x6,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 1 -- `rcwscasp x1,x2,x4,x5,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 3 -- `rcwscasp x0,x1,x5,x6,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 1 -- `rcwscaspa x1,x2,x4,x5,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 3 -- `rcwscaspa x0,x1,x5,x6,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 1 -- `rcwscaspal x1,x2,x4,x5,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 3 -- `rcwscaspal x0,x1,x5,x6,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 1 -- `rcwscaspl x1,x2,x4,x5,\[x16\]' | ||
| .*: Error: reg pair must start from even reg at operand 3 -- `rcwscaspl x0,x1,x5,x6,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwclrp x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwclrpa x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwclrpal x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwclrpl x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsclrp x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsclrpa x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsclrpal x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsclrpl x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwswpp x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwswppa x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwswppal x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwswppl x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsswpp x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsswppa x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsswppal x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsswppl x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsetp x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsetpa x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsetpal x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwsetpl x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwssetp x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwssetpa x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwssetpal x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 2 -- `rcwssetpl x0,x31,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwclrp x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwclrpa x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwclrpal x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwclrpl x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsclrp x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsclrpa x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsclrpal x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsclrpl x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwswpp x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwswppa x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwswppal x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwswppl x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsswpp x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsswppa x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsswppal x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsswppl x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsetp x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsetpa x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsetpal x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwsetpl x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwssetp x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwssetpa x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwssetpal x31,x0,\[x16\]' | ||
| .*: Error: expected an integer or zero register at operand 1 -- `rcwssetpl x31,x0,\[x16\]' |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,11 @@ | ||
| .text | ||
| .irp op casp, caspa, caspal, caspl, scasp, scaspa, scaspal, scaspl | ||
| rcw\op x1, x2, x4, x5, [x16] | ||
| rcw\op x0, x1, x5, x6, [x16] | ||
| .endr | ||
| .irp op clrp, clrpa, clrpal, clrpl, sclrp, sclrpa, sclrpal, sclrpl, swpp, swppa, swppal, swppl, sswpp, sswppa, sswppal, sswppl, setp, setpa, setpal, setpl, ssetp, ssetpa, ssetpal, ssetpl | ||
| rcw\op x0, x31, [x16] | ||
| .endr | ||
| .irp op clrp, clrpa, clrpal, clrpl, sclrp, sclrpa, sclrpal, sclrpl, swpp, swppa, swppal, swppl, sswpp, sswppa, sswppal, sswppl, setp, setpa, setpal, setpl, ssetp, ssetpa, ssetpal, ssetpl | ||
| rcw\op x31, x0, [x16] | ||
| .endr |
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