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Get compatible with latest cocotb #2

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51 changes: 28 additions & 23 deletions cocotbext/apb/base.py
Original file line number Diff line number Diff line change
Expand Up @@ -31,8 +31,8 @@
import cocotb
from cocotb.triggers import RisingEdge, ReadOnly
from cocotb.binary import BinaryValue
from cocotb.drivers import BusDriver
from cocotb.monitors import BusMonitor
from cocotb_bus.drivers import BusDriver
from cocotb_bus.monitors import BusMonitor
from cocotb.result import ReturnValue
from cocotb.decorators import coroutine

Expand Down Expand Up @@ -279,7 +279,9 @@ class APBMasterDriver(BusDriver):
Drives data onto the APB bus to setup for read/write to slave devices.
"""

def __init__(self, entity, name, clock, pkg=False, signals=None, **kwargs):
def __init__(self, entity, name, clock, pkg=False, signals=None, spec_rev="APB3", **kwargs):

self.spec_rev = spec_rev

# has the signals been explicitely defined?
if signals:
Expand Down Expand Up @@ -310,9 +312,11 @@ def __init__(self, entity, name, clock, pkg=False, signals=None, **kwargs):
"PREADY"]

self._optional_signals = [
"PSLVERR",
"PSTRB"]
"PSLVERR"]

# TODO make it enum
if self.spec_rev == "APB4":
self._optional_signals.append("PSTRB")

# inheret the bus driver
BusDriver.__init__(self, entity, name, clock, bus_separator='.', **kwargs)
Expand All @@ -324,7 +328,8 @@ def __init__(self, entity, name, clock, pkg=False, signals=None, **kwargs):
self.bus.PSEL.setimmediatevalue(0)
self.bus.PENABLE.setimmediatevalue(0)
self.bus.PWDATA.setimmediatevalue(0)
self.bus.PSTRB.setimmediatevalue(0)
if self.spec_rev == "APB4":
self.bus.PSTRB.setimmediatevalue(0)

self.reset()

Expand All @@ -336,7 +341,7 @@ def reset(self):

# initialise the transmit queue
self.transmit_queue = deque()
self.transmit_coroutine = 0
self.transmit_coroutine : cocotb.Task = None


async def busy_send(self, transaction):
Expand All @@ -362,7 +367,7 @@ async def _driver_send(self, transaction, sync=True, hold=False, **kwargs):
# queue once it gets to them.
if not hold:
if not self.transmit_coroutine:
self.transmit_coroutine = cocotb.fork(self._transmit_pipeline())
self.transmit_coroutine = cocotb.start_soon(self._transmit_pipeline())


async def _transmit_pipeline(self):
Expand All @@ -380,33 +385,33 @@ async def _transmit_pipeline(self):
while len(self.transmit_queue) > 0 or state != 'IDLE':

if state == 'SETUP':

# get a new transaction from the queue
current_transaction = self.transmit_queue.popleft()
current_transaction.start_time = cocotb.utils.get_sim_time('ns')

# assign values in the control phase
self.bus.PSEL <= 1
self.bus.PADDR <= current_transaction.address
self.bus.PWRITE <= pwrite.index(current_transaction.direction)
self.bus.PSEL.value = 1
self.bus.PADDR.value = current_transaction.address
self.bus.PWRITE.value = pwrite.index(current_transaction.direction)

# create the PSTRB signal
pstrb_int = 0
for i, pstrb_i in enumerate(current_transaction.strobe):
pstrb_int += pstrb_i << i
self.bus.PSTRB <= pstrb_int
if self.spec_rev == "APB4":
pstrb_int = 0
for i, pstrb_i in enumerate(current_transaction.strobe):
pstrb_int += pstrb_i << i
self.bus.PSTRB.value = pstrb_int

# write the data to the bus
if current_transaction.direction == 'WRITE':
self.bus.PWDATA <= current_transaction.data
self.bus.PWDATA.value = current_transaction.data

# update state
state = 'ACCESS'

elif state == 'ACCESS':

# tell the slave we're ready for the access phase
self.bus.PENABLE <= 1
self.bus.PENABLE.value = 1

state = 'SAMPLE'

Expand All @@ -431,13 +436,13 @@ async def _transmit_pipeline(self):
state = 'SETUP'
else:
state = 'IDLE'
self.bus.PENABLE <= 0
self.bus.PENABLE.value = 0

# reset the bus signals
self.bus.PWDATA <= 0
self.bus.PWRITE <= 0
self.bus.PSEL <= 0
self.bus.PENABLE <= 0
self.bus.PWDATA.value = 0
self.bus.PWRITE.value = 0
self.bus.PSEL.value = 0
self.bus.PENABLE.value = 0

self.transfer_busy = False

Expand Down