MAINT: codespell

.github/workflows/workflows.yml

@@ -0,0 +1,23 @@
+name: standard tests
+
+on:
+  pull_request:
+  push:
+    branches: [main, development]
+
+jobs:
+  pre-commit:
+    runs-on: ubuntu-latest
+    steps:
+    - uses: actions/checkout@v4
+    - uses: actions/setup-python@v5
+    - uses: pre-commit/[email protected]
+
+  installation:
+    runs-on: ubuntu-latest
+    steps:
+      - uses: actions/checkout@v3
+      - uses: actions/setup-python@v3
+      - name: Install dependencies
+        run: |
+          pip install -e .

.pre-commit-config.yaml

@@ -1,11 +1,17 @@
 repos:
 -   repo: https://github.com/pre-commit/pre-commit-hooks
-    rev: v2.3.0
+    rev: v5.0.0
     hooks:
     -   id: check-yaml
     -   id: end-of-file-fixer
     -   id: trailing-whitespace
+
 -   repo: https://github.com/psf/black
-    rev: 22.10.0
+    rev: 24.10.0
     hooks:
     -   id: black
+
+-   repo: https://github.com/codespell-project/codespell
+    rev: v2.3.0
+    hooks:
+    -   id: codespell

aidatlu/hardware/clock_controller.py

@@ -80,7 +80,7 @@ def write_clock_register(self, address: int, data: int) -> None:
         self.i2c.write(self.i2c.modules["clk"], address, data)
 
     def parse_clock_conf(self, file_path: str) -> list:
-        """reads the clock config file and returns a panda dataframe with two rows Adress and Data
+        """reads the clock config file and returns a panda dataframe with two rows Address and Data
            The configuration file is produced by Clockbuilder Pro (Silicon Labs).
 
         Args:

aidatlu/hardware/dac_controller.py

@@ -24,7 +24,7 @@ def set_threshold(
         """Sets the Threshold voltage for the trigger input channel. Use channel = 7 to set threshold for all channels.
 
         Args:
-            trigger_channel (int): Trigger input channel. From 1 to 7, where 7 controlls all input channels.
+            trigger_channel (int): Trigger input channel. From 1 to 7, where 7 controls all input channels.
             threshold_voltage (float): Threshold voltage in volt.
             ref_v (float): Reference voltage of the DAC. Defaults to the external reference voltage 1.3 V.
         """

aidatlu/hardware/dut_controller.py

@@ -25,7 +25,7 @@ def set_dut_mask(self, enable: int | str) -> None:
         self.log.debug("DUT mask set to %s" % self.get_dut_mask())
 
     def set_dut_mask_mode(self, mode: int | str) -> None:
-        """Sets the DUT interface mode. Mode consits of one 8-bit WORD or more specific 4 2-bit WORDs.
+        """Sets the DUT interface mode. Mode consists of one 8-bit WORD or more specific 4 2-bit WORDs.
             Each 2-bit WORD corresponds to one HDMI output and its mode.
             With HDMI channel 1 = bit 0 and 1, channel 2 = bit 2 and 3, channel 3 = bit 4 and 5 and channel 4 = bit 6 and 7.
             The mode is set with X0 = EUDET and X1 = AIDA. #TODO They mention the leading bit X can be used for future modes. Is this still up to date?
@@ -57,7 +57,7 @@ def set_dut_mask_mode_modifier(self, value: int) -> None:
 
     def set_dut_ignore_busy(self, channels: int | str) -> None:
         """If set the TLU ignores the BUSY signal from a DUT in AIDA mode.
-            Channels consits of a 4-bit WORD describing the DUT interfaces.
+            Channels consists of a 4-bit WORD describing the DUT interfaces.
             With DUT interface 1 = bit 0, interface 2 = bit 1, interface 3 = bit 2 and interface 4 = bit 3.
             #TODO not sure if this is true here. No answers in documentation.
 

aidatlu/hardware/i2c.py

@@ -167,7 +167,7 @@ def write_array(self, device_addr: int, mem_addr: int, values: list) -> None:
     def _compare_value_read_write(self, written: int, read: int, function: str) -> None:
         if written != read:
             self.log.warning(
-                "Mismatch in register function %s. written value %s, recieved value: %s."
+                "Mismatch in register function %s. written value %s, received value: %s."
                 % (function, written, read)
             )
         else:

aidatlu/hardware/ioexpander_controller.py

@@ -247,7 +247,7 @@ def configure_hdmi(self, hdmi_channel: int, enable: int | str) -> None:
         """This enables the pins of one HDMI channel as input (0) or output (1).
             Enable is a 4-bit WORD for each pin as integer or binary string. With CONT = bit 0, SPARE = bit 1, TRIG = bit 2 and BUSY = bit 3.
             E.q. 0b0111 or '0111' sets CONT, SPARE and TRIGGER as outputs and BUSY as input. '1100' sets CONT and SPARE as input and BUSY and TRIG as output.
-            The clock runs with the seperate function: clock_hdmi_output.
+            The clock runs with the separate function: clock_hdmi_output.
 
         Args:
             hdmi_num (int): HDMI channels from 1 to 4

aidatlu/main/data_parser.py

@@ -35,7 +35,7 @@ def interpret_data(
     ) -> None:
         """Interprets raw tlu data. The data is interpreted in chunksizes.
         The data is parsed form filepath_in to filepath_out.
-        An event consists of six consecutive raw data entries tha last entry should be a 0.
+        An event consists of six consecutive raw data entries the last entry should be always 0.
         The raw data is sliced and the last data entry checked for corrupted data.
 
         Args:
@@ -123,7 +123,7 @@ def _transform_data(
             w5 (np.array): this should always be 0.
 
         Returns:
-            np.array: array with coloumns
+            np.array: array with columns
         """
         if np.any(w5) != 0:
             self.log.warning("Corrupted Data found")

aidatlu/main/tlu.py

@@ -213,7 +213,7 @@ def stop_run(self) -> None:
         self.run_number += 1
 
     def set_enable_record_data(self, value: int) -> None:
-        """#TODO not sure what this does. Looks like a seperate internal event buffer to the FIFO.
+        """#TODO not sure what this does. Looks like a separate internal event buffer to the FIFO.
 
         Args:
             value (int): #TODO I think this does not work
@@ -494,7 +494,7 @@ def run(self) -> None:
                 current_event = self.pull_fifo_event()
         except:
             KeyboardInterrupt
-            self.log.warning("Interupted FIFO cleanup")
+            self.log.warning("Interrupted FIFO cleanup")
 
         if self.zmq_address not in [None, "off"]:
             self.socket.close()

aidatlu/misc/aida_tlu_test.ini

@@ -24,7 +24,7 @@ I2C_DAC2_Addr = 0x1F
 I2C_ID_Addr = 0x50
 #I2C address of 1st expander PCA9539PW
 I2C_EXP1_Addr = 0x74
-#I2C address of 2st expander PCA9539PW
+#I2C address of 2nd expander PCA9539PW
 I2C_EXP2_Addr = 0x75
 #I2C address of AD5665R on powermodule
 I2C_DACModule_Addr = 0x1C

aidatlu/online_monitor/configuration.yaml

@@ -4,7 +4,7 @@ converter :
         kind : tlu_converter
         frontend : tcp://131.220.165.88:1500
         backend : tcp://127.0.0.1:7501
-        theshold: 10
+        threshold: 10
 
 receiver :
     AIDA_TLU :

docs/source/Documentation.rst

@@ -237,7 +237,7 @@ AIDA Mode
 In AIDA mode the clock of the TLU and the DUT is synchronized.
 For this the TLU clock needs to be distributed.
 The distribution of the clock via the LEMO has the problem that the clock signal form no longer arrives cleanly at the device.
-So distributing the clock usign the HDMI connectors is advised.
+So distributing the clock using the HDMI connectors is advised.
 An important step is to synchronize all delays (e.q. different cable length) of the clock signal with the trigger signal if encountered.
 
 At the start of a run the TLU sends out a RESET signal to the DUT.