#3 Initial Skeleton Interface for Gate Driver

[nwdepatie]

Changes

Here is an initial skeleton for what I'm envisioning the interface for interacting with the gate driver to look like. A lot of this stuff is STM internal (i.e. the current ADCs) so we prob don't need "drivers" for that, but for the actual isolated ADC we probably do.

Notes

Moving forward, we are gonna have to be super anal about signal synchronization. Especially for PWM, we want to calculate all the PWM values to write and then write them all at once in an ideal world. I can take more of a look at how STM does this in our example code that was generated.

Test Cases

• Made sure it built, since its a skeleton there isn't functionality yet

To Do

Lot of stuff outside of this PR to address in future tickets

• double check STM interface for ADC callbacks (i.e. ADC -> DMA -> Interrupt -> STM HAL code probably -> Our callback)

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Closes #3

[nwdepatie]

Don't mind the changes in this file, I think that STM generated this with Windows line endings and I'm working on Linux so VSCode saved the whole file with Linux line endings

[MandarinPine18]

The signature in the header has the identifier as init_gatedrv - mismatch here