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@scale-lab @AUCOHL

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  1. AUCOHL/Fault AUCOHL/Fault Public

    A complete open-source design-for-testing (DFT) Solution

    Swift 143 30

  2. Fault-SPM Fault-SPM Public

    SPM with DFT structure automatically injected by Fault

    Verilog 4 1

  3. Caravel-OpenFPGA-EF Caravel-OpenFPGA-EF Public

    Forked from efabless/caravel_mpw-one

    Verilog 8 1

  4. efabless/caravel efabless/caravel Public

    Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.

    Verilog 299 69

  5. efabless/caravel_user_project efabless/caravel_user_project Public template

    https://caravel-user-project.readthedocs.io

    Verilog 187 331