force mgmt output in dft mode for gl to work

M0stafaRady · Mar 25, 2024 · b2ea2d1 · b2ea2d1
1 parent c462a30
commit b2ea2d1
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Showing 5 changed files with 91 additions and 44 deletions.
diff --git a/verilog/dv/cocotb/all_tests/common/common.py b/verilog/dv/cocotb/all_tests/common/common.py
@@ -1,7 +1,7 @@
 import cocotb
 from caravel_cocotb.interfaces.common_functions.test_functions import read_config_file, test_configure
 
-
+from cocotb.handle import Force
 from cocotb.triggers import ClockCycles
 
 async def test_configure_dft(dut: cocotb.handle.SimHandle,
@@ -29,4 +29,49 @@ def disable_dft_testmode(dut):
     dut.gpio30_en.value = 1
     dut.gpio30.value = 0
     dut.gpio31_en.value = 1
-    dut.gpio31.value = 0
+    dut.gpio31.value = 0
+
+def isolate_mgmt_out(dut):
+    mgmt_hdl = dut.uut.chip_core.soc
+    mgmt_hdl.debug_mode.value = Force(0)
+    mgmt_hdl.debug_oeb.value = Force(0)
+    mgmt_hdl.debug_out.value = Force(0)
+    mgmt_hdl.flash_clk.value = Force(0)
+    mgmt_hdl.flash_csb.value = Force(0)
+    mgmt_hdl.flash_io0_do.value = Force(0)
+    mgmt_hdl.flash_io0_oeb.value = Force(0)
+
+    # mgmt_hdl.flash_io1_do.value = Force(0)
+    # mgmt_hdl.flash_io1_oeb.value = Force(0)
+    # mgmt_hdl.flash_io2_do.value = Force(0)
+    # mgmt_hdl.flash_io2_oeb.value = Force(0)
+    # mgmt_hdl.flash_io3_do.value = Force(0)
+    # mgmt_hdl.flash_io3_oeb.value = Force(0)
+
+    mgmt_hdl.gpio_inenb_pad.value = Force(0)
+    mgmt_hdl.gpio_mode0_pad.value = Force(0)
+    mgmt_hdl.gpio_mode1_pad.value = Force(0)
+    mgmt_hdl.gpio_out_pad.value = Force(0)
+    mgmt_hdl.gpio_outenb_pad.value = Force(0)
+    mgmt_hdl.hk_cyc_o.value = Force(0)
+    mgmt_hdl.hk_stb_o.value = Force(0)
+    mgmt_hdl.la_iena.value = Force(0)
+    mgmt_hdl.la_oenb.value = Force(0)
+    mgmt_hdl.la_output.value = Force(0)
+    mgmt_hdl.mprj_adr_o.value = Force(0)
+    mgmt_hdl.mprj_cyc_o.value = Force(0)
+    mgmt_hdl.mprj_dat_o.value = Force(0)
+    mgmt_hdl.mprj_sel_o.value = Force(0)
+    mgmt_hdl.mprj_stb_o.value = Force(0)
+    mgmt_hdl.mprj_wb_iena.value = Force(0)
+    mgmt_hdl.mprj_we_o.value = Force(0)
+    mgmt_hdl.qspi_enabled.value = Force(0)
+    mgmt_hdl.ser_tx.value = Force(0)
+    mgmt_hdl.spi_csb.value = Force(0)
+    mgmt_hdl.spi_enabled.value = Force(0)
+    mgmt_hdl.spi_sck.value = Force(0)
+    mgmt_hdl.spi_sdo.value = Force(0)
+    mgmt_hdl.spi_sdoenb.value = Force(0)
+    mgmt_hdl.trap.value = Force(0)
+    mgmt_hdl.uart_enabled.value = Force(0)
+    mgmt_hdl.user_irq_ena.value = Force(0)
diff --git a/verilog/dv/cocotb/all_tests/dft_golden/dft_golden.py b/verilog/dv/cocotb/all_tests/dft_golden/dft_golden.py
@@ -1,7 +1,7 @@
 import cocotb
 from cocotb.triggers import ClockCycles
 import cocotb.log
-from all_tests.common.common import test_configure_dft
+from all_tests.common.common import test_configure_dft, isolate_mgmt_out
 from caravel_cocotb.caravel_interfaces import report_test
 from user_design import configure_userdesign
 from dft import DFT
@@ -10,8 +10,9 @@
 @cocotb.test()
 @report_test
 async def dft_golden(dut):
-    caravelEnv = await test_configure_dft(dut, timeout_cycles=126792, is_test_mode=True)
+    caravelEnv = await test_configure_dft(dut, timeout_cycles=126792, is_test_mode=False, num_error=60)
     dft = DFT(caravelEnv)
+    isolate_mgmt_out(dut)
     vector_file = f'{cocotb.plusargs["USER_PROJECT_ROOT"]}/verilog/dv/cocotb/all_tests/dft_golden/mgmt_core_wrapper.vec.bin'.replace('"', '')
     out_file = f'{cocotb.plusargs["USER_PROJECT_ROOT"]}/verilog/dv/cocotb/all_tests/dft_golden/mgmt_core_wrapper.out.bin'.replace('"', '')
     chosen_numbers = random.sample(range(8, 278), 10)

diff --git a/verilog/dv/cocotb/all_tests/dft_scan_chain/dft_scan_chain.py b/verilog/dv/cocotb/all_tests/dft_scan_chain/dft_scan_chain.py
@@ -1,7 +1,7 @@
 import cocotb
 from cocotb.triggers import ClockCycles
 import cocotb.log
-from all_tests.common.common import test_configure_dft
+from all_tests.common.common import test_configure_dft, isolate_mgmt_out
 from caravel_cocotb.caravel_interfaces import report_test
 from user_design import configure_userdesign
 from dft import DFT
@@ -10,8 +10,9 @@
 @cocotb.test()
 @report_test
 async def dft_scan_chain(dut):
-    caravelEnv = await test_configure_dft(dut, timeout_cycles=12396, is_test_mode=True)
+    caravelEnv = await test_configure_dft(dut, timeout_cycles=12396, is_test_mode=False)
     dft = DFT(caravelEnv)
+    isolate_mgmt_out(dut)
     await dft.start_dft()
     # Generate a random number with 5600 bits
     vector = random.getrandbits(5600)

diff --git a/verilog/includes/includes.gl.caravel_user_project b/verilog/includes/includes.gl.caravel_user_project
@@ -8,13 +8,13 @@
 -v $(USER_PROJECT_VERILOG)/gl/caravel_core.v
 
 # default blocks 
--v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_0c00.v
+#-v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_0c00.v
 -v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_0c01.v
--v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_0402.v
+#-v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_0402.v
 -v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_0403.v
--v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_0800.v
+#-v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_0800.v
 -v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_0801.v
--v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_1800.v
+#-v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_1800.v
 -v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_1803.v
--v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_1808.v
+#-v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_1808.v
 -v $(USER_PROJECT_VERILOG)/gl/gpio_defaults_block_1809.v
diff --git a/verilog/rtl/user_defines.v b/verilog/rtl/user_defines.v
@@ -52,41 +52,41 @@
 // up in a state that can be used immediately without depending on
 // the management SoC to run a startup program to configure the GPIOs.
 
-`define USER_CONFIG_GPIO_5_INIT  `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_6_INIT  `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_7_INIT  `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_8_INIT  `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_9_INIT  `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_10_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_11_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_12_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_13_INIT `GPIO_MODE_INVALID
+`define USER_CONFIG_GPIO_5_INIT  `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_6_INIT  `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_7_INIT  `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_8_INIT  `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_9_INIT  `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_10_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_11_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_12_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_13_INIT `GPIO_MODE_MGMT_STD_OUTPUT
 
 // Configurations of GPIO 14 to 24 are used on caravel but not caravan.
-`define USER_CONFIG_GPIO_14_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_15_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_16_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_17_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_18_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_19_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_20_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_21_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_22_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_23_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_24_INIT `GPIO_MODE_INVALID
+`define USER_CONFIG_GPIO_14_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_15_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_16_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_17_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_18_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_19_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_20_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_21_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_22_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_23_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_24_INIT `GPIO_MODE_MGMT_STD_OUTPUT
 
-`define USER_CONFIG_GPIO_25_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_26_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_27_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_28_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_29_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_30_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_31_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_32_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_33_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_34_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_35_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_36_INIT `GPIO_MODE_INVALID
-`define USER_CONFIG_GPIO_37_INIT `GPIO_MODE_INVALID
+`define USER_CONFIG_GPIO_25_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_26_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_27_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_28_INIT `GPIO_MODE_MGMT_STD_INPUT_PULLDOWN
+`define USER_CONFIG_GPIO_29_INIT `GPIO_MODE_MGMT_STD_INPUT_PULLDOWN
+`define USER_CONFIG_GPIO_30_INIT `GPIO_MODE_MGMT_STD_INPUT_PULLDOWN
+`define USER_CONFIG_GPIO_31_INIT `GPIO_MODE_MGMT_STD_INPUT_PULLDOWN
+`define USER_CONFIG_GPIO_32_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_33_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_34_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_35_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_36_INIT `GPIO_MODE_MGMT_STD_OUTPUT
+`define USER_CONFIG_GPIO_37_INIT `GPIO_MODE_MGMT_STD_OUTPUT
 
 `endif // __USER_DEFINES_H