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It's an RTL change
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GregAC committed May 18, 2023
1 parent 6f2a656 commit dcb8fe5
Showing 1 changed file with 0 additions and 7 deletions.
7 changes: 0 additions & 7 deletions hw/ip/gpio/rtl/gpio.sv
Original file line number Diff line number Diff line change
Expand Up @@ -18,11 +18,6 @@ module gpio

// Bus interface
input tlul_pkg::tl_h2d_t tl_i,
output tlul_pkg::tl_d2h_t tl_o,

// Interrupts
output logic [31:0] intr_gpio_o,

// Alerts
input prim_alert_pkg::alert_rx_t [NumAlerts-1:0] alert_rx_i,
output prim_alert_pkg::alert_tx_t [NumAlerts-1:0] alert_tx_o,
Expand All @@ -49,8 +44,6 @@ module gpio
.AsyncOn(GpioAsyncOn),
.CntWidth(CntWidth)
) u_filter (
.clk_i,
.rst_ni,
.enable_i(reg2hw.ctrl_en_input_filter.q[i]),
.filter_i(cio_gpio_i[i]),
.thresh_i({CntWidth{1'b1}}),
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