add examples for stm32 board and generic riscv64 platform

.github/workflows/build.yml

@@ -24,10 +24,10 @@ jobs:
       run: git submodule update --init
 
     - name: Build QEMU
-      run: mkdir -p qemu/build/debug; cd qemu/build/debug;  ./../../configure --target-list=arm-softmmu --enable-debug --enable-plugins --disable-sdl --disable-gtk --disable-curses --disable-vnc; make -j $(nproc --all); echo "done"
+      run: mkdir -p qemu/build/debug; cd qemu/build/debug;  ./../../configure --target-list=arm-softmmu,riscv64-softmmu --enable-debug --enable-plugins --disable-sdl --disable-gtk --disable-curses --disable-vnc; make -j $(nproc --all); echo "done"
 
     - name: Build Faultplugin
       run: cd faultplugin; make -j; echo "done"
 
     - name: Run ARCHIE
-      run: python3 controller.py --debug --qemu qemuconf.json --fault fault.json test.hdf5
+      run: cd examples/stm32; ./run.sh; cd ../riscv64; ./run.sh

build.sh

@@ -98,13 +98,17 @@ make clean && make
 cd ..
 
 echo "Test ARCHIE"
-python3 controller.py --debug --qemu qemuconf.json --fault fault.json test.hdf5
+cd examples/stm32
+./run.sh
+cd - && cd examples/riscv64
+./run.sh
+cd -
 
-echo "Do you want to delete log files and HDF5 file?"
+echo "Do you want to delete log files and HDF5 file inside the example directory?"
 select yn in "YES" "NO"; do
 	case $yn in
-		YES ) rm log_* && rm test.hdf5 && echo "Deleted log and HDF5 files"; break;;
-		NO ) echo "cmd to delete: rm log_* && rm test.hdf5"; break;;
+		YES ) rm examples/stm32/log_* && rm examples/stm32/output.hdf5 && rm examples/riscv64/log_* && rm examples/riscv64/output.hdf5 && echo "Deleted log and HDF5 files"; break;;
+		NO ) echo "cmd to delete: rm log_* && rm output.hdf5"; break;;
 	esac
 	echo "Please type the number corresponding to Yes or No"
 done

controller.py

@@ -1,3 +1,5 @@
+#!/usr/bin/env python3
+
 import argparse
 import logging
 import lzma

examples/riscv64/fault.json

@@ -0,0 +1,54 @@
+{
+	"max_instruction_count": 100,
+	"start" : {
+		"address" : 0x80000014,
+		"counter" : 1
+	},
+	"end" : [
+	    {
+		"address" : 0x8000002a,
+		"counter" : 3
+	    },
+	    {
+		"address" : 0x8000003c,
+		"counter" : 1
+	    }
+	],
+	"faults" :[
+			[
+				{
+					"fault_address"		: [0x87ffffec],
+					"fault_type"		: "data",
+					"fault_model"		: "set0",
+					"fault_lifespan"	: [100],
+					"fault_mask"		: [1],
+					"trigger_address"	: [0x80000024],
+					"trigger_counter"	: [1]
+				}
+			],
+			[
+				{
+					"fault_address"		: [0x8000002a],
+					"fault_type"		: "instruction",
+					"fault_model"		: "overwrite",
+					"num_bytes" 		: 2,
+					"fault_lifespan"	: [10],
+					"fault_mask"		: [0x0001],
+					"trigger_address"	: [0x80000024],
+					"trigger_counter"	: [1]
+				}
+			],
+			[
+				{
+					"fault_address"		: [15],
+					"fault_type"		: "register",
+					"fault_model"		: "set0",
+					"fault_lifespan"	: [0],
+					"fault_mask"		: [0xffffffff],
+					"trigger_address"	: [0x80000028],
+					"trigger_counter"	: [1]
+				}
+			]
+		],
+	"mem_info": true
+}

examples/riscv64/qemuconf.json

@@ -0,0 +1,8 @@
+{
+	"qemu" : "../../qemu/build/debug/riscv64-softmmu/qemu-system-riscv64",
+	"bios" : "none",
+	"kernel" : "minimal.elf",
+	"plugin" : "../../faultplugin/libfaultplugin.so",
+	"machine" : "virt",
+	"additional_qemu_args" : ""
+}

examples/riscv64/run.sh

@@ -0,0 +1,2 @@
+#!/bin/sh
+python ../../controller.py --debug --fault fault.json  --qemu qemuconf.json output.hdf5

examples/riscv64/src/Makefile

@@ -0,0 +1,11 @@
+BINARY = minimal
+
+PREFIX 		:=riscv64-unknown-elf-
+
+CC 		:=$(PREFIX)gcc
+
+make:
+	$(CC) -g -ffreestanding -Wl,--gc-sections -nostartfiles -nostdlib -nodefaultlibs -Wl,-T,riscv64-virt.ld crt0.s minimal.c -o $(BINARY).elf
+
+clean:
+	rm $(BINARY).elf

examples/riscv64/src/crt0.s

@@ -0,0 +1,8 @@
+.section .init, "ax"
+.global _start
+_start:
+    .option norelax
+    la sp, __stack_top
+    add s0, sp, zero
+    jal zero, main
+    .end

examples/riscv64/src/minimal.c

@@ -0,0 +1,18 @@
+int main(void) {
+    volatile int i = 1;
+    volatile int x = 0;
+
+    while (i) {
+	__asm__("nop");
+    }
+
+    x = 0x10;
+
+    // Another loop to ensure that the program does not lock up after finishing execution.
+    // Otherwise archie will wait infinitely
+    while (x) {
+	__asm__("nop");
+    }
+
+    return x;
+}

examples/riscv64/src/riscv64-virt.ld

@@ -0,0 +1,7 @@
+MEMORY
+{
+   RAM (rwx)  : ORIGIN = 0x80000000, LENGTH = 128M 
+}
+ENTRY(_start)
+
+PROVIDE(__stack_top = ORIGIN(RAM) + LENGTH(RAM));

examples/stm32/fault.json

@@ -0,0 +1,60 @@
+{
+	"max_instruction_count": 100,
+	"start" : {
+		"address" : 0x0800006a,
+		"counter" : 1
+	},
+	"end" :[
+	    {
+		"address" : 0x08000056,
+		"counter" : 3
+	    },
+	    {
+		"address" : 0x08000070,
+		"counter" : 1
+	    }
+],
+	"faults" :[
+			[
+				{
+					"fault_address"		: [0x20001fec],
+					"fault_type"		: "data",
+					"fault_model"		: "set0",
+					"fault_lifespan"	: [100],
+					"fault_mask"		: [1],
+					"trigger_address"	: [0x0800004a],
+					"trigger_counter"	: [1]
+				}
+			],
+			[
+				{
+					"fault_address"		: [0x08000056],
+					"fault_type"		: "instruction",
+					"fault_model"		: "overwrite",
+					"num_bytes" 		: 2,
+					"fault_lifespan"	: [100],
+					"fault_mask"		: [0x46c0],
+					"trigger_address"	: [0x08000040],
+					"trigger_counter"	: [1]
+				}
+			],
+			[
+				{
+					"fault_address"		: [3],
+					"fault_type"		: "register",
+					"fault_model"		: "set0",
+					"fault_lifespan"	: [0],
+					"fault_mask"		: [0xffffffff],
+					"trigger_address"	: [0x08000054],
+					"trigger_counter"	: [1]
+				}
+			]
+		],
+	"memorydump": [
+			{
+				"address" : 0x08000000,
+				"length" : 1023
+			}
+		],
+	"mem_info": true
+}

examples/stm32/qemuconf.json

@@ -0,0 +1,8 @@
+{
+	"qemu" : "../../qemu/build/debug/arm-softmmu/qemu-system-arm",
+	"bios" : "",
+	"kernel" : "minimal.elf",
+	"plugin" : "../../faultplugin/libfaultplugin.so",
+	"machine" : "stm32vldiscovery",
+	"additional_qemu_args" : ""
+}

examples/stm32/run.sh

@@ -0,0 +1,2 @@
+#!/bin/sh
+python ../../controller.py --debug --fault fault.json  --qemu qemuconf.json output.hdf5

examples/stm32/src/Makefile

@@ -0,0 +1,13 @@
+BINARY = minimal
+
+PREFIX 		:=arm-none-eabi-
+
+CC 		:=$(PREFIX)gcc
+
+LDSCRIPT = ./stm32f0-discovery.ld
+
+make:
+	$(CC) -g -mcpu=cortex-m0 -mthumb -Wl,-static -nostartfiles -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group -Wl,-T,$(LDSCRIPT) minimal.c -o $(BINARY).elf
+
+clean:
+	rm $(BINARY).elf -f

examples/stm32/src/minimal.c

@@ -0,0 +1,47 @@
+typedef void (*vector_table_entry_t)(void);
+
+typedef struct {
+	unsigned int *initial_sp_value; /**< Initial stack pointer value. */
+	vector_table_entry_t reset;
+	vector_table_entry_t nmi;
+	vector_table_entry_t hard_fault;
+	vector_table_entry_t memory_manage_fault; /* not in CM0 */
+	vector_table_entry_t bus_fault;           /* not in CM0 */
+	vector_table_entry_t usage_fault;         /* not in CM0 */
+	vector_table_entry_t reserved_x001c[4];
+	vector_table_entry_t sv_call;
+	vector_table_entry_t debug_monitor;       /* not in CM0 */
+	vector_table_entry_t reserved_x0034;
+	vector_table_entry_t pend_sv;
+	vector_table_entry_t systick;
+	vector_table_entry_t irq[0];
+} vector_table_t;
+
+extern vector_table_t vector_table;
+
+int main(void) {
+    volatile int i = 1;
+    volatile int x = 0;
+
+    while (i) {
+	__asm__("nop");
+    }
+
+    x = 0x10;
+
+    return x;
+}
+
+void reset_handler(void) {
+    main();
+
+    while(1) {
+	__asm__("nop");
+    }
+}
+
+__attribute__ ((section(".vectors")))
+vector_table_t vector_table = {
+	.initial_sp_value = (unsigned *)0x20002000,
+	.reset = reset_handler
+};

examples/stm32/src/stm32f0-discovery.ld

@@ -0,0 +1,21 @@
+MEMORY
+{
+	rom (rx) : ORIGIN = 0x08000000, LENGTH = 64K
+	ram (rwx) : ORIGIN = 0x20000000, LENGTH = 8K
+}
+
+EXTERN (vector_table)
+
+ENTRY(reset_handler)
+
+SECTIONS
+{
+	.text : {
+		*(.vectors)	/* Vector table */
+		*(.text*)	/* Program code */
+		. = ALIGN(4);
+	} >rom
+
+	end = .;
+}
+