Failed circuits

Failed_subcircuits/CD4013/CD4013-cache.lib

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+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# DC
+#
+DEF DC v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "DC" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 50 1 1 w
+X - 2 0 -450 300 U 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# buf
+#
+DEF buf X 0 40 N N 1 F N
+F0 "X" -50 -50 60 H V C CNN
+F1 "buf" -50 50 60 H V C CNN
+F2 "" -50 -50 60 H I C CNN
+F3 "" -50 -50 60 H I C CNN
+DRAW
+T 0 -200 50 60 0 0 0 in Normal 0 C C
+T 0 200 50 60 0 0 0 out Normal 0 C C
+T 900 -50 150 60 0 0 0 v+ Normal 0 C C
+T 900 -50 -150 60 0 0 0 v- Normal 0 C C
+P 4 0 1 0 -100 100 -100 -100 100 0 -100 100 N
+X in 1 -300 0 200 R 50 50 1 1 I
+X v+ 2 0 250 200 D 50 50 1 1 I
+X v- 3 0 -250 200 U 50 50 1 1 I
+X out 4 300 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# inv
+#
+DEF inv X 0 40 N N 1 F N
+F0 "X" -50 -50 60 H V C CNN
+F1 "inv" 0 50 60 H V C CNN
+F2 "" -50 50 60 H I C CNN
+F3 "" -50 50 60 H I C CNN
+DRAW
+T 0 -200 50 60 0 0 0 in Normal 0 C C
+T 0 250 50 60 0 0 0 out Normal 0 C C
+T 900 -50 150 60 0 0 0 v+ Normal 0 C C
+T 900 -50 -150 60 0 1 0 v- Normal 0 C C
+A 125 0 25 1 1799 0 1 0 N 150 0 100 0
+A 125 0 25 -1799 -1 0 1 0 N 100 0 150 0
+P 4 0 1 0 -100 100 -100 -100 100 0 -100 100 N
+X in 1 -300 0 200 R 50 50 1 1 I
+X V+ 2 0 250 200 D 50 50 1 1 I
+X V- 3 0 -250 200 U 50 50 1 1 I
+X out 4 350 0 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# nand
+#
+DEF nand X 0 40 N N 1 F N
+F0 "X" 0 -50 60 H V C CNN
+F1 "nand" 0 50 60 H V C CNN
+F2 "" 0 -50 60 H I C CNN
+F3 "" 0 -50 60 H I C CNN
+DRAW
+T 0 -200 100 60 0 0 0 in1 Normal 0 C C
+T 0 -200 0 60 0 0 0 in2 Normal 0 C C
+T 0 250 50 60 0 0 0 out Normal 0 C C
+T 900 -50 200 60 0 0 0 V+ Normal 0 C C
+T 900 -50 -200 60 0 0 0 V- Normal 0 C C
+A 0 0 112 634 -634 0 1 0 N 50 100 50 -100
+A 125 0 25 1 1799 0 1 0 N 150 0 100 0
+A 125 0 25 -1799 -1 0 1 0 N 100 0 150 0
+P 2 0 1 0 -100 100 50 100 N
+P 3 0 1 0 -100 100 -100 -100 50 -100 N
+X in1 1 -300 50 200 R 50 50 1 1 I
+X V+ 2 0 300 200 D 50 50 1 1 I
+X V- 3 0 -300 200 U 50 50 1 1 I
+X out 4 350 0 200 L 50 50 1 1 O
+X in2 5 -300 -50 200 R 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# plot_v1
+#
+DEF plot_v1 U 0 40 Y Y 1 F N
+F0 "U" 0 500 60 H V C CNN
+F1 "plot_v1" 200 350 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 0 500 100 0 1 0 N
+X ~ ~ 0 200 200 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# pulse
+#
+DEF pulse v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "pulse" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+A -25 -450 501 928 871 0 1 0 N -50 50 0 50
+A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50
+A 75 600 551 -926 -873 0 1 0 N 50 50 100 50
+A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50
+A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50
+A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 50 1 1 P
+X - 2 0 -450 300 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# tg
+#
+DEF tg X 0 40 N N 1 F N
+F0 "X" -50 50 60 H V C CNN
+F1 "tg" 0 0 60 H V C CNN
+F2 "" 550 150 60 H I C CNN
+F3 "" 550 150 60 H I C CNN
+DRAW
+C 0 100 50 0 1 0 N
+P 4 0 1 0 -100 0 100 100 100 -100 -100 0 N
+P 4 0 1 0 -100 100 -100 -100 100 0 -100 100 N
+X inout1 1 -300 0 200 R 50 50 1 1 B
+X Cbar 2 0 350 200 D 50 50 1 1 I
+X C 3 0 -250 200 U 50 50 1 1 I
+X inout2 4 300 0 200 L 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
+#End Library

Failed_subcircuits/CD4013/CD4013.cir

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+* C:\Users\arpit\coding\esim_projects\CD4013\CD4013.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 08/07/22 20:00:56
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+v1  vdd GND DC		
+v2  reset GND pulse		
+v3  Din GND pulse		
+v4  set GND pulse		
+v5  clk GND pulse		
+U4  reset plot_v1		
+U1  Din plot_v1		
+U3  set plot_v1		
+U2  clk plot_v1		
+U6  Q plot_v1		
+U5  Qbar plot_v1		
+X2  reset vdd GND Net-_X14-Pad1_ inv		
+X1  set vdd GND Net-_X1-Pad4_ inv		
+X4  Net-_X10-Pad2_ vdd GND Net-_X10-Pad3_ inv		
+X5  Net-_X11-Pad4_ vdd GND Net-_X13-Pad1_ inv		
+X3  clk vdd GND Net-_X10-Pad2_ inv		
+X6  Din Net-_X10-Pad3_ Net-_X10-Pad2_ Net-_X6-Pad4_ tg		
+X8  Net-_X8-Pad1_ Net-_X10-Pad2_ Net-_X10-Pad3_ Net-_X6-Pad4_ tg		
+X10  Net-_X10-Pad1_ Net-_X10-Pad2_ Net-_X10-Pad3_ Net-_X10-Pad4_ tg		
+X15  Net-_X10-Pad1_ Net-_X10-Pad3_ Net-_X10-Pad2_ Net-_X14-Pad4_ tg		
+X7  Net-_X14-Pad1_ vdd GND Net-_X10-Pad4_ Net-_X6-Pad4_ nand		
+X9  Net-_X10-Pad4_ vdd GND Net-_X8-Pad1_ Net-_X1-Pad4_ nand		
+X11  Net-_X10-Pad1_ vdd GND Net-_X11-Pad4_ Net-_X1-Pad4_ nand		
+X14  Net-_X14-Pad1_ vdd GND Net-_X14-Pad4_ Net-_X11-Pad4_ nand		
+X13  Net-_X13-Pad1_ vdd GND Q buf		
+X12  Net-_X10-Pad1_ vdd GND Qbar buf		
+
+.end

Failed_subcircuits/CD4013/CD4013.cir.out

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+* c:\users\arpit\coding\esim_projects\cd4013\cd4013.cir
+
+.include cmos_tg.sub
+.include CMOS_inverter.sub
+.include cmos_buffer.sub
+.include cmos__nand.sub
+v1 vdd gnd  dc 5
+v2  reset gnd pulse(0 0 0 0 0 10n 200n)
+v3  din gnd pulse(0 5 0 0 0 25n 50n)
+v4  set gnd pulse(0 5 0 0 0 10n 400n)
+v5  clk gnd pulse(0 5 0 0 0 7.5n 15n)
+* u4  reset plot_v1
+* u1  din plot_v1
+* u3  set plot_v1
+* u2  clk plot_v1
+* u6  q plot_v1
+* u5  qbar plot_v1
+x2 reset vdd gnd net-_x14-pad1_ CMOS_inverter
+x1 set vdd gnd net-_x1-pad4_ CMOS_inverter
+x4 net-_x10-pad2_ vdd gnd net-_x10-pad3_ CMOS_inverter
+x5 net-_x11-pad4_ vdd gnd net-_x13-pad1_ CMOS_inverter
+x3 clk vdd gnd net-_x10-pad2_ CMOS_inverter
+x6 din net-_x10-pad3_ net-_x10-pad2_ net-_x6-pad4_ cmos_tg
+x8 net-_x8-pad1_ net-_x10-pad2_ net-_x10-pad3_ net-_x6-pad4_ cmos_tg
+x10 net-_x10-pad1_ net-_x10-pad2_ net-_x10-pad3_ net-_x10-pad4_ cmos_tg
+x15 net-_x10-pad1_ net-_x10-pad3_ net-_x10-pad2_ net-_x14-pad4_ cmos_tg
+x7 net-_x14-pad1_ vdd gnd net-_x10-pad4_ net-_x6-pad4_ cmos__nand
+x9 net-_x10-pad4_ vdd gnd net-_x8-pad1_ net-_x1-pad4_ cmos__nand
+x11 net-_x10-pad1_ vdd gnd net-_x11-pad4_ net-_x1-pad4_ cmos__nand
+x14 net-_x14-pad1_ vdd gnd net-_x14-pad4_ net-_x11-pad4_ cmos__nand
+x13 net-_x13-pad1_ vdd gnd q cmos_buffer
+x12 net-_x10-pad1_ vdd gnd qbar cmos_buffer
+.tran 0.1e-09 400e-09 0e-09
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+plot v(reset)
+plot v(din)
+plot v(set)
+plot v(clk)
+plot v(q)
+plot v(qbar)
+.endc
+.end

Failed_subcircuits/CD4013/CD4013.pro

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+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri

Failed_subcircuits/CD4013/CD4013.proj

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+schematicFile CD4013.sch