fix logic

FAIR-Chem · Jul 9, 2024 · a853451 · a853451
1 parent bf16cad
commit a853451
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/src/fairchem/core/trainers/base_trainer.py b/src/fairchem/core/trainers/base_trainer.py
@@ -294,7 +294,7 @@ def load_datasets(self) -> None:
                 self.train_dataset,
                 self.train_sampler,
             )
-        elif ~self.config.get("dataset", None):
+        elif self.config.get("dataset", None) is None:
             self.config["dataset"] = {}
 
         if self.config.get("val_dataset", None):