Skip to content

Commit

Permalink
CMakeLists: Add a RISCV_NONE toolchain
Browse files Browse the repository at this point in the history
Add a RISCV_NONE toolchain to target an embedded environment. This
allows building libspdm libraries with mbedtls.

Signed-off-by: Alistair Francis <[email protected]>
  • Loading branch information
alistair23 authored and jyao1 committed Nov 29, 2023
1 parent 60367f9 commit 874e4a9
Show file tree
Hide file tree
Showing 3 changed files with 48 additions and 0 deletions.
26 changes: 26 additions & 0 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -89,6 +89,8 @@ if(CMAKE_SYSTEM_NAME MATCHES "Linux")
MESSAGE("TOOLCHAIN = RISCV_GNU")
elseif(TOOLCHAIN STREQUAL "RISCV64_GCC")
MESSAGE("TOOLCHAIN = RISCV64_GCC")
elseif(TOOLCHAIN STREQUAL "RISCV_NONE")
MESSAGE("TOOLCHAIN = RISCV_NONE")
elseif(TOOLCHAIN STREQUAL "RISCV_XPACK")
MESSAGE("TOOLCHAIN = RISCV_XPACK")
elseif(TOOLCHAIN STREQUAL "ARC_GCC")
Expand Down Expand Up @@ -417,6 +419,30 @@ if(CMAKE_SYSTEM_NAME MATCHES "Linux")

SET(CMAKE_C_LINK_EXECUTABLE "<CMAKE_LINKER> <LINK_FLAGS> <OBJECTS> -o <TARGET> -Wl,--start-group <LINK_LIBRARIES> -Wl,--end-group")

elseif(TOOLCHAIN STREQUAL "RISCV_NONE")
SET(CMAKE_C_COMPILER riscv64-elf-gcc)
ADD_COMPILE_OPTIONS(-nostdlib -lgcc)
if(CMAKE_BUILD_TYPE STREQUAL "Debug")
ADD_COMPILE_OPTIONS(-g)
endif()

if(ARCH STREQUAL "riscv32")
ADD_COMPILE_OPTIONS(-march=rv32imac_zicsr -mabi=ilp32)
elseif(ARCH STREQUAL "riscv64")
ADD_COMPILE_OPTIONS(-march=rv64imac_zicsr -mabi=lp64)
else()
ADD_COMPILE_OPTIONS(-march=error -mabi=error)
endif()

SET(CMAKE_AR riscv64-elf-ar)

SET(CMAKE_LINKER riscv64-elf-gcc)
SET(CMAKE_EXE_LINKER_FLAGS "-no-pie" )

SET(MBEDTLS_FLAGS -nostdlib -lgcc)

SET(CMAKE_C_LINK_EXECUTABLE "<CMAKE_LINKER> <LINK_FLAGS> <OBJECTS> -o <TARGET> -Wl,--start-group <LINK_LIBRARIES> -Wl,--end-group")

elseif(TOOLCHAIN STREQUAL "RISCV_XPACK")
SET(CMAKE_C_COMPILER riscv-none-elf-gcc)
SET(CMAKE_SHARED_LIBRARY_LINK_C_FLAGS "")
Expand Down
1 change: 1 addition & 0 deletions README.md
Original file line number Diff line number Diff line change
Expand Up @@ -92,6 +92,7 @@
| [RISCV_GNU](https://github.com/riscv/riscv-gnu-toolchain) | - | - | - | - | riscv32-unknown-linux-gnu-gcc | riscv64-unknown-linux-gnu-gcc |
| [RISCV64_GCC](https://packages.ubuntu.com/bionic/gcc-riscv64-linux-gnu) | - | - | - | - | - | riscv64-linux-gnu-gcc |
| [RISCV_XPACK](https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack) | - | - | - | - | riscv-none-elf-gcc | riscv-none-elf-gcc |
| [RISCV_NONE](https://archlinux.org/packages/extra/x86_64/riscv64-elf-gcc/) | - | - | - | - | riscv64-elf-gcc | riscv64-elf-gcc |

## Documents

Expand Down
21 changes: 21 additions & 0 deletions doc/build.md
Original file line number Diff line number Diff line change
Expand Up @@ -97,6 +97,16 @@ b) [RISCV GNU](https://github.com/riscv-collab/riscv-gnu-toolchain)
c) [RISCV64 GCC](https://packages.ubuntu.com/bionic/gcc-riscv64-linux-gnu) for RISCV64 only
- `sudo apt-get install gcc-riscv64-linux-gnu`
d) [RISCV NONE](https://archlinux.org/packages/extra/x86_64/riscv64-elf-gcc/)
- Use a [GCC](https://gcc.gnu.org/) compiler configured for building
baremetal (not Linux) binaries. This is supported by any modern Linux
distro.
- On Arch it can be installed with
```
sudo pacman -Syu riscv32-elf-binutils riscv32-elf-newlib riscv64-elf-binutils riscv64-elf-gcc riscv64-elf-newlib
```
#### Compiler for ARC
a) [ARC GNU](https://github.com/foss-for-synopsys-dwc-arc-processors).
Expand Down Expand Up @@ -291,3 +301,14 @@ Unit tests can be disable by adding -DDISABLE_TESTS=1 to CMake.
```shell
-DDISABLE_TESTS=1
```

### Embedded builds for RISC-V

The libspdm libraries can be built along with Mbed TLS to target an embedded
environment. The Integrator must provide a C library and runtime, such as Newlib.

To build libspdm with Mbed TLS for RISC-V 32-bit run the following

```
cmake -DARCH=riscv32 -DTOOLCHAIN=RISCV_NONE -DTARGET=Debug -DCRYPTO=mbedtls -DDISABLE_TESTS=1 ..
```

0 comments on commit 874e4a9

Please sign in to comment.