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Increase bits generated for RVC immediates #40

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merged 1 commit into from
Apr 18, 2024

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elliotb-lowrisc
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Some compressed instructions use immediate bits above the range previously being generated.
Some instructions were using more bits than were being generated. Others were skipping LSBs to select higher bits only.

Instructions that set the upper limit on immediate bits required:
C.J / C.JAL (imm[11:...]),
C.LQSP / C.SQSP (uimm[9:...]),
C.LUI (nzimm[17:..]) (no increase required), and
C.ADDI4SPN (nzuimm[9:...])

Some compressed instructions use immediate bits above the
range previously being generated.
Some instructions were using more bits than were being generated.
Others were skipping LSBs to select higher bits only.

Instructions that set the upper limit on immediate bits required:
`C.J` / `C.JAL` (imm[11:...]),
`C.LQSP` / `C.SQSP` (uimm[9:...]),
`C.LUI` (nzimm[17:..]) (no increase required), and
`C.ADDI4SPN` (nzuimm[9:...])
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@marnovandermaas marnovandermaas left a comment

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I double checked this and it looks right to me.

@marnovandermaas marnovandermaas merged commit 4a65da8 into CTSRD-CHERI:master Apr 18, 2024
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@elliotb-lowrisc elliotb-lowrisc deleted the c_imm branch April 19, 2024 15:29
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2 participants