Milestone-1b

CSpyridakis · Oct 29, 2018 · 98480dc · 98480dc
1 parent 596ae38
commit 98480dc
Show file tree

Hide file tree

Showing 2 changed files with 15 additions and 22 deletions.
diff --git a/ChangeLog b/ChangeLog
@@ -1,5 +1,13 @@
+Mon Oct 29 20:37:12 EEST - Spyridakis Christos <[email protected]>
+	-Milestone-1b:
+		* ISSUE unit implemented
+		* RS unit implemented
+		* FU unit implemented
+		* CDB unit implemented
+		* RF unit implemented
+
 Mon Oct 22 2:37:12 EEST - Spyridakis Christos <[email protected]>
-	-Milestone1:
+	-Milestone-1a:
 		* I/O connections specified for each unit
 		* Diagrams for each individual unit
 		* Top Diagram

diff --git a/TODO.md b/TODO.md
@@ -5,10 +5,8 @@
 	* RF : 
 
 	* RS :
- 		-VHDL-
- 		a) Reg_Rs control Fix
+
 	* FU :
-		Test FU that is working properly
 
 	* CDB :
 
@@ -17,26 +15,13 @@
 
 # Completed:
 	* Issue :
-		block diagram v1
-
+		
 	* RF : 
-		block diagram v1
-
+		
 	* RS :
-		block diagram v1
-
-		-Diagram-
-		a) L_Link  
- 		b) X_Accepted signal to bus
 
 	* FU :
-		block diagram v1
-		FU implemented 
-
+
 	* CDB :
-		block diagram v1
-
-	*Else:
-		Top module block diagram v1
-		-Diagram-
-		a) RD <-> FU X_Available to X_Accepted
+		
+	*Else: