- Bulacan, Philippines
- https://www.linkedin.com/in/angelo-jacobo
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First Open-Source Industry-Specific Model for Semiconductors
Unit Tested implementation of SPI protocol in verilog
Tutorial of a HW design of MicroBlaze using DDR3 RAM on Arty A7 board; DDR3 RAM speed test application
Get up and running with Llama 3.3, Mistral, Gemma 2, and other large language models.
Interact with your documents using the power of GPT, 100% privately, no data leaks
A minimal GPU design in Verilog to learn how GPUs work from the ground up
JavaScript syntax highlighter with language auto-detection and zero dependencies.
Verilog for a SECDED Hsaio ECC and a DEC ECC. Power, delay, and area are compared for Berkeley MASIC EEW241B - Advanced Digital Integrated Circuits.
Hamming ECC Encoder and Decoder to protect memories
Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our special Video Controller in Basys3 Artix7-35T. Complemented…
A configurable RTL to bitstream FPGA toolchain
🎲 A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
Formal Verification of RVECC Error Correcting Code Hardware
List of awesome open source hardware tools, generators, and reusable designs
Tiny, fast, non-dependent and fully loaded printf implementation for embedded systems. Extensive test suite passing.
Robust Speech Recognition via Large-Scale Weak Supervision