watchdog: Add support for setting interrupt trigger type (#57)

Updated WS0 interrupt test to use the feature. Signed-off-by: Sakar Arora <[email protected]> Signed-off-by: Rajat Goyal <[email protected]>
ARM-software · Dec 20, 2018 · c4457f9 · c4457f9
1 parent 9171e45
commit c4457f9
Show file tree

Hide file tree

Showing 8 changed files with 81 additions and 1 deletion.
diff --git a/platform/pal_uefi/SbsaPalLib.inf b/platform/pal_uefi/SbsaPalLib.inf
@@ -61,6 +61,7 @@
   gHardwareInterruptProtocolGuid                ## CONSUMES
   gEfiCpuArchProtocolGuid                       ## CONSUMES
   gEfiPciIoProtocolGuid                         ## CONSUMES
+  gHardwareInterrupt2ProtocolGuid               ## CONSUMES
 
 [Guids]
   gEfiAcpi20TableGuid

diff --git a/platform/pal_uefi/include/pal_uefi.h b/platform/pal_uefi/include/pal_uefi.h
@@ -81,6 +81,14 @@ typedef enum {
   ENTRY_TYPE_GICITS
 }GIC_INFO_TYPE_e;
 
+/* Interrupt Trigger Type */
+typedef enum {
+  INTR_TRIGGER_INFO_LEVEL_LOW,
+  INTR_TRIGGER_INFO_LEVEL_HIGH,
+  INTR_TRIGGER_INFO_EDGE_FALLING,
+  INTR_TRIGGER_INFO_EDGE_RISING
+}INTR_TRIGGER_INFO_TYPE_e;
+
 /**
   @brief  structure instance for GIC entry
 **/

diff --git a/platform/pal_uefi/src/pal_gic.c b/platform/pal_uefi/src/pal_gic.c
@@ -22,12 +22,14 @@
 #include "Include/IndustryStandard/Acpi61.h"
 #include <Protocol/AcpiTable.h>
 #include <Protocol/HardwareInterrupt.h>
+#include <Protocol/HardwareInterrupt2.h>
 
 #include "include/pal_uefi.h"
 
 static EFI_ACPI_6_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *gMadtHdr;
 
 EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL;
+EFI_HARDWARE_INTERRUPT2_PROTOCOL *gInterrupt2 = NULL;
 
 
 UINT64
@@ -179,3 +181,34 @@ pal_gic_end_of_interrupt(UINT32 int_id)
   return 0;
 }
 
+/**
+  @brief  Set Trigger type Edge/Level
+
+  @param  int_id  Interrupt ID which needs to be enabled and service routine installed for
+  @param  trigger_type  Interrupt Trigger Type Edge/Trigger
+
+  @return Status of the operation
+**/
+UINT32
+pal_gic_set_intr_trigger(UINT32 int_id, INTR_TRIGGER_INFO_TYPE_e trigger_type)
+{
+
+  EFI_STATUS  Status;
+
+  /* Find the interrupt protocol. */
+  Status = gBS->LocateProtocol (&gHardwareInterrupt2ProtocolGuid, NULL, (VOID **)&gInterrupt2);
+  if (EFI_ERROR(Status)) {
+    return 0xFFFFFFFF;
+  }
+
+  Status = gInterrupt2->SetTriggerType (
+                   gInterrupt2,
+                   int_id,
+                   trigger_type
+                   );
+
+  if (EFI_ERROR(Status))
+    return 0xFFFFFFFF;
+
+  return 0;
+}
diff --git a/test_pool/timer_wd/test_w002.c b/test_pool/timer_wd/test_w002.c
@@ -70,6 +70,12 @@ payload()
 
       val_gic_install_isr(int_id, isr);
 
+      /* Set Interrupt Type Edge/Level Trigger */
+      if (val_wd_get_info(wd_num, WD_INFO_IS_EDGE))
+          val_gic_set_intr_trigger(int_id, INTR_TRIGGER_INFO_EDGE_RISING);
+      else
+          val_gic_set_intr_trigger(int_id, INTR_TRIGGER_INFO_LEVEL_HIGH);
+
       val_wd_set_ws0(wd_num, timer_expire_ticks);
 
       while ((--timeout > 0) && (IS_RESULT_PENDING(val_get_status(index))));

diff --git a/val/include/pal_interface.h b/val/include/pal_interface.h
@@ -107,6 +107,14 @@ typedef enum {
   ENTRY_TYPE_GICITS
 }GIC_INFO_TYPE_e;
 
+/* Interrupt Trigger Type */
+typedef enum {
+  INTR_TRIGGER_INFO_LEVEL_LOW,
+  INTR_TRIGGER_INFO_LEVEL_HIGH,
+  INTR_TRIGGER_INFO_EDGE_FALLING,
+  INTR_TRIGGER_INFO_EDGE_RISING
+}INTR_TRIGGER_INFO_TYPE_e;
+
 /**
   @brief  structure instance for GIC entry
 **/
@@ -126,6 +134,7 @@ typedef struct {
 void     pal_gic_create_info_table(GIC_INFO_TABLE *gic_info_table);
 uint32_t pal_gic_install_isr(uint32_t int_id, void (*isr)(void));
 uint32_t pal_gic_end_of_interrupt(uint32_t int_id);
+uint32_t pal_gic_set_intr_trigger(uint32_t int_id, INTR_TRIGGER_INFO_TYPE_e trigger_type);
 
 
 /** Timer tests related definitions **/

diff --git a/val/include/val_interface.h b/val/include/val_interface.h
@@ -80,6 +80,7 @@ uint32_t val_gic_route_interrupt_to_pe(uint32_t int_id, uint64_t mpidr);
 uint32_t val_gic_get_interrupt_state(uint32_t int_id);
 void val_gic_clear_interrupt(uint32_t int_id);
 void val_gic_cpuif_init(void);
+void val_gic_set_intr_trigger(uint32_t int_id, INTR_TRIGGER_INFO_TYPE_e trigger_type);
 
 /*TIMER VAL APIs */
 typedef enum {
@@ -121,7 +122,8 @@ typedef enum {
   WD_INFO_CTRL_BASE,
   WD_INFO_REFRESH_BASE,
   WD_INFO_GSIV,
-  WD_INFO_ISSECURE
+  WD_INFO_ISSECURE,
+  WD_INFO_IS_EDGE
 }WD_INFO_TYPE_e;
 
 void     val_wd_create_info_table(uint64_t *wd_info_table);

diff --git a/val/src/avs_gic.c b/val/src/avs_gic.c
@@ -297,3 +297,22 @@ void val_gic_cpuif_init(void)
   val_gic_reg_write(ICC_BPR1_EL1, 0x7);
   val_gic_reg_write(ICC_PMR_EL1, 0xff);
 }
+
+/**
+  @brief   This function will Set the trigger type Edge/Level based on the GTDT table
+           1. Caller       -  Test Suite
+           2. Prerequisite -  val_gic_create_info_table
+  @param   int_id Interrupt ID
+  @param   trigger_type Interrupt Trigger Type
+  @return  none
+**/
+void val_gic_set_intr_trigger(uint32_t int_id, INTR_TRIGGER_INFO_TYPE_e trigger_type)
+{
+  uint32_t status;
+
+  val_print(AVS_PRINT_DEBUG, "\n    Setting Trigger type as %d  ", trigger_type);
+  status = pal_gic_set_intr_trigger(int_id, trigger_type);
+
+  if (status)
+    val_print(AVS_PRINT_ERR, "\n    Error Could Not Configure Trigger Type", 0);
+}
diff --git a/val/src/avs_wd.c b/val/src/avs_wd.c
@@ -80,6 +80,8 @@ val_wd_get_info(uint32_t index, WD_INFO_TYPE_e info_type)
       return g_wd_info_table->wd_info[index].wd_gsiv;
     case WD_INFO_ISSECURE:
       return ((g_wd_info_table->wd_info[index].wd_flags >> 2) & 1);
+    case WD_INFO_IS_EDGE:
+      return ((g_wd_info_table->wd_info[index].wd_flags) & 1);
     default:
       return 0;
   }