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Verilog2EMP

Circuit file for the EMP Toolkit

This directory contains the code to convert the netlist generated by TinyGarble to the circuit format used in the EMP Toolkit. A fork of emp-ag2pc with command line interface to run user defined circuits is available here.

Circuit Format

All the input bits from the garbler are concatenated to form a single input g_input. Similarly all the input bits from the evaluator are concatenated to form a single input e_input and all the output bits are concatenated to form a single input o. The module structure is as follows.

module _name_ ( 
  input [N-1:0] g_input,
  input [M-1:0] e_input,
  output [P-1:0] o
  );
  
  //description
  
endmodule 

EMP Format

<No_of_gates> <No_of_wires>
<Bit_width_of_g_input> <Bit_width_of_e_input> <Bit_width_of_o> 

for g = 0 to <No_of_gates>-1
	<No_of_input_bit><No_of_output_bit> <index of input0 wire> <index of input1 wire>  <index of output wire> <LOGIC>
endfor

Usage

./V2EMP_Main 

  -h [ --help ]         produce help message.
  -i [ --netlist ] arg  Input netlist (verilog .v) file address.
  -o [ --emp ] arg      Output EMPCircuit file address.

References