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Fix sram0 address and update SRAM1_IRAM_START macro for ESP32 SoCs #82813

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merged 2 commits into from
Dec 12, 2024
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Fix sram0 address and update SRAM1_IRAM_START macro for ESP32 SoCs #82813

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3254291
soc: esp32: change SRAM1_IRAM_START macro definition
wmrsouza Dec 10, 2024
0e4dc15
dts: esp32: fix sram0 start address for esp32c2 and esp32c3
wmrsouza Dec 10, 2024
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4 changes: 2 additions & 2 deletions dts/riscv/espressif/esp32c2/esp32c2_common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -56,9 +56,9 @@
compatible = "simple-bus";
ranges;

sram0: memory@40370000 {
sram0: memory@4037c000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x40370000 DT_SIZE_K(16)>;
reg = <0x4037c000 DT_SIZE_K(16)>;
zephyr,memory-region = "SRAM0";
};

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4 changes: 2 additions & 2 deletions dts/riscv/espressif/esp32c3/esp32c3_common.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -80,9 +80,9 @@
compatible = "simple-bus";
ranges;

sram0: memory@40370000 {
sram0: memory@4037c000 {
compatible = "zephyr,memory-region", "mmio-sram";
reg = <0x40370000 DT_SIZE_K(16)>;
reg = <0x4037c000 DT_SIZE_K(16)>;
zephyr,memory-region = "SRAM0";
};

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2 changes: 1 addition & 1 deletion soc/espressif/esp32c2/memory.h
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Expand Up @@ -9,7 +9,7 @@
#define SRAM0_SIZE DT_REG_SIZE(DT_NODELABEL(sram0))

/* SRAM1 (256kB) memory */
#define SRAM1_IRAM_START (SRAM0_IRAM_START + SRAM0_SIZE)
#define SRAM1_IRAM_START (SRAM1_DRAM_START + IRAM_DRAM_OFFSET)
#define SRAM1_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram1))
#define SRAM1_SIZE DT_REG_SIZE(DT_NODELABEL(sram1))

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2 changes: 1 addition & 1 deletion soc/espressif/esp32c3/memory.h
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Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@
#define SRAM0_SIZE DT_REG_SIZE(DT_NODELABEL(sram0))
/* SRAM1 (384kB) memory */
#define SRAM1_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram1))
#define SRAM1_IRAM_START (SRAM0_IRAM_START + SRAM0_SIZE)
#define SRAM1_IRAM_START (SRAM1_DRAM_START + IRAM_DRAM_OFFSET)
#define SRAM1_SIZE DT_REG_SIZE(DT_NODELABEL(sram1))
/* ICache size is fixed to 16KB on ESP32-C3 */
#define ICACHE_SIZE SRAM0_SIZE
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