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entry instruction not supported #3
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I have been experimenting with a simple entry implementation to allow the decompiler to run on esp32 binaries. Some help would be useful. I guess as is normally a1 (sp) :entry as, u15_12.23_sb3 is u15_12.23_sb3 & as & u2_6.7 = 0b00 & u2_4.5 = 0b11 & op0 = 0b0110 { In case that the register window overflows, this interrupt is called. but that is probably not important for decompiling the code. a5 contains call[j+1]’s stack pointer and registers are saved to call[j+1]’s stack frame _WindowOverflow4: | s32e a0, a5, -16 |
A simple naive implementation would be more useful than the currrent unimplemented one. The Xtensa windowed register calling conventionIs designed to efficiently pass arguments and return values in AR registers The register windows for the caller and the callee are not the same, but they partially overlap. As many as six words of arguments can be passed from the caller to the callee in these overlapping registers, and as many as four words of a return value can be returned in the same registers. If all the arguments do not fit in registers, the rest are passed on the stack. Similarly, if the return value needs more than four words, the value is returned on the stack instead of the AR registers. The Windowed Register Option replaces the simple 16-entry AR register file with a larger register file from which a window of 16 entries is visible at any given time. The window is rotated on subroutine entry and exit, automatically saving and restoring some registers. When the window is rotated far enough to require registers to be saved to or re- stored from the program stack, an exception is raised to move some of the register values between the register file and the program stack. The option reduces code size and increases performance of programs by eliminating register saves and restores at procedure entry and exit, and by reducing argument-shuffling at calls. It allows more local variables to live permanently in registers, reducing the need for stack-frame maintenance in non-leaf routines. Xtensa ISA register windows are different from register windows in other instruction sets. Xtensa register increments are 4, 8, and 12 on a per-call basis, not a fixed incre- ment as in other instruction sets. Also, Xtensa processors have no global address registers. The caller specifies the increment amount, while the callee performs the actual in- crement by the ENTRY instruction. ExampleThe registers that the caller uses for arguments and return values are determined by the size of the register window. The window size must be added to the register numbers seen by the callee. For example, if the caller uses a CALL8 instruction, the window size is 8. x = proc1 (1, 2, 3) |
My idea worked. https://github.com/Ebiroll/ghidra-xtensa However it is not 100% correct, but good enough to get decompilation. |
Is this being looked into? Are register windows supported for the Sparc descriptor in Ghidra, and useful for reference? |
The main problem, as they have noted is: |
Some input by the experts would be useful. |
per title. It seems the entry instruction isn't supported (which seems like a really common instruction, at least in the esp32 binary I'm working on right now), which is making any decompilation impossible.
If you need a binary let me know, I can provide one.
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