diff --git a/hw/ip/pwm/dv/env/pwm_env_cfg.sv b/hw/ip/pwm/dv/env/pwm_env_cfg.sv
index fd299cb333d27..551a987150786 100644
--- a/hw/ip/pwm/dv/env/pwm_env_cfg.sv
+++ b/hw/ip/pwm/dv/env/pwm_env_cfg.sv
@@ -15,8 +15,6 @@ class pwm_env_cfg extends cip_base_env_cfg #(.RAL_T(pwm_reg_block));
   virtual clk_rst_if    clk_rst_core_vif;
   int                   core_clk_freq_mhz;
 
-  // variables
-  param_reg_t           pwm_param[PWM_NUM_CHANNELS];
   // ratio between bus_clk and core_clk (must be >= 1)
   rand int clk_ratio;
   constraint clk_ratio_c { clk_ratio inside {[1: 4]}; }
diff --git a/hw/ip/pwm/dv/env/seq_lib/pwm_perf_vseq.sv b/hw/ip/pwm/dv/env/seq_lib/pwm_perf_vseq.sv
index 0465ab08aea68..95d9e8dd76067 100644
--- a/hw/ip/pwm/dv/env/seq_lib/pwm_perf_vseq.sv
+++ b/hw/ip/pwm/dv/env/seq_lib/pwm_perf_vseq.sv
@@ -8,8 +8,9 @@ class pwm_perf_vseq extends pwm_rand_output_vseq;
   `uvm_object_new
 
   // variables
-  rand bit [15:0] rand_dc;
-  rand bit [15:0] rand_blink;
+  rand bit [15:0]  rand_dc;
+  rand bit [15:0]  rand_blink;
+  rand param_reg_t pwm_param[PWM_NUM_CHANNELS];
 
   // constraints
   constraint rand_chan_c {
@@ -52,9 +53,9 @@ class pwm_perf_vseq extends pwm_rand_output_vseq;
       set_duty_cycle(i, .A(rand_dc[i]), .B(rand_dc[i]));
       set_blink(i, .A(rand_blink[i]), .B(rand_blink[i]));
 
-      cfg.pwm_param[i].HtbtEn = rand_reg_param.HtbtEn;
-      cfg.pwm_param[i].BlinkEn = rand_reg_param.BlinkEn;
-      set_param(i, cfg.pwm_param[i]);
+      pwm_param[i].HtbtEn = rand_reg_param.HtbtEn;
+      pwm_param[i].BlinkEn = rand_reg_param.BlinkEn;
+      set_param(i, pwm_param[i]);
     end
 
     set_ch_invert(rand_invert);
diff --git a/hw/ip/pwm/dv/env/seq_lib/pwm_rand_output_vseq.sv b/hw/ip/pwm/dv/env/seq_lib/pwm_rand_output_vseq.sv
index dc625261c615b..dae8749a88fe9 100644
--- a/hw/ip/pwm/dv/env/seq_lib/pwm_rand_output_vseq.sv
+++ b/hw/ip/pwm/dv/env/seq_lib/pwm_rand_output_vseq.sv
@@ -40,13 +40,17 @@ class pwm_rand_output_vseq extends pwm_base_vseq;
     // set random dc and params for all channels
     for (uint i = 0; i < PWM_NUM_CHANNELS; i++) begin
       dc_blink_t duty_cycle = rand_pwm_duty_cycle();
+      param_reg_t pwm_param;
+
+      pwm_param.PhaseDelay = (rand_reg_param.PhaseDelay * (2**(-16)));
+      pwm_param.HtbtEn = rand_reg_param.HtbtEn;
+      pwm_param.BlinkEn = rand_reg_param.BlinkEn;
+
       set_duty_cycle(i, .A(duty_cycle.A), .B(duty_cycle.B));
       rand_pwm_blink(i);
+
       // phase delay of the PWM rising edge, in units of 2^(-16) PWM cycles
-      cfg.pwm_param[i].PhaseDelay = (rand_reg_param.PhaseDelay * (2**(-16)));
-      cfg.pwm_param[i].HtbtEn = rand_reg_param.HtbtEn;
-      cfg.pwm_param[i].BlinkEn = rand_reg_param.BlinkEn;
-      set_param(i, cfg.pwm_param[i]);
+      set_param(i, pwm_param);
     end
 
     set_ch_invert(rand_invert);
diff --git a/hw/ip/pwm/dv/env/seq_lib/pwm_smoke_vseq.sv b/hw/ip/pwm/dv/env/seq_lib/pwm_smoke_vseq.sv
index 80a133c47e081..cc4da6f9f0454 100644
--- a/hw/ip/pwm/dv/env/seq_lib/pwm_smoke_vseq.sv
+++ b/hw/ip/pwm/dv/env/seq_lib/pwm_smoke_vseq.sv
@@ -16,6 +16,9 @@ class pwm_smoke_vseq extends pwm_base_vseq;
 
 
   virtual task body();
+    param_reg_t pwm_param;
+    `DV_CHECK_STD_RANDOMIZE_WITH_FATAL(pwm_param, pwm_param.BlinkEn == 1;)
+
     //make sure write to regs are enabled
     set_reg_en(Enable);
 
@@ -24,11 +27,9 @@ class pwm_smoke_vseq extends pwm_base_vseq;
     //setup general config
     set_cfg_reg(10, 1, 1);
 
-    cfg.pwm_param[0].BlinkEn = 1;
-
     set_duty_cycle(.channel(0), .A(13000), .B(6500));
     set_blink(.channel(0), .A(0), .B(0));
-    set_param(0, cfg.pwm_param[0]);
+    set_param(0, pwm_param);
 
     // enable channel 0
     set_ch_enables(32'h1);