Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components

Intel Quartus Prime Synthesis Engine for Docker

Music Light Cube | 音樂全彩光立方（主倉庫）

Fork of OpenVeriFla - FPGA debugging logic analyzer to use with your designs - examples (so far) for ice40/IceStorm

Simple SoC in VHDL with full toolchain and custom board.

Pong game on FPGA Max 10 DE10-Lite, written in VHDL.

Tutorial and example projects for the Arrow MAX1000 FPGA board

Reference designs and firmware for open-source RISC-V core implementation on MX10 and SpiderSoM

Projects and labs from the courses dictated in https://www.coursera.org/specializations/fpga-design. Projects are sometimes simulated, and implemented in either a MAX10-Lite or an Arrow MAX1000 board.-

NeoPixel LED Controller | NeoPixel LED 控制器 | 基於MAX10 FPGA的音樂全彩光立方LED控制器

Clock Data Recovery | 時鐘數據恢復

Automatically create a NIOS II Eclipse Project with the latest FreeRTOS Version, the Intel hwlib and more...

ADC demo on the Terasic DE10-Lite board with MAX10 FPGA

SiFive's Freedom e300 for the DECA Max10 FPGA

Tool that removes lines in .svf files to preserve the security key stored in Intel® MAX® 10 devices.

JH_Advanced Haasoscope

Source codes of examples from the book Verilog by Examples

Golden Hardware Reference Designs (GHRD) for System On Chips in FPGA (SOCFPGA)

a simple blinky project for Intel MAX10 - 10M08 Evaluation Kit

Indicar direcciones correctas para obtener MicroFPGAs CYC1000 MAX1000