From 2105b5c93e19439d5bf3eb14d42395ed932bc12f Mon Sep 17 00:00:00 2001 From: simond Date: Thu, 22 Nov 2018 14:25:20 +0000 Subject: [PATCH] Added status information for test suites --- doc/README.adoc | 32 +++++----------------- riscv-test-suite/README.md | 54 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+), 25 deletions(-) create mode 100644 riscv-test-suite/README.md diff --git a/doc/README.adoc b/doc/README.adoc index a04d54e..bef326f 100644 --- a/doc/README.adoc +++ b/doc/README.adoc @@ -115,12 +115,16 @@ Any custom words for spell checking should be added to link:./custom.wordlist[`c This document has been created by the following people (in alphabetical order of surname). [quote] -Jeremy Bennett, Mary Bennett, Simon Davidmann, Radek Hajek, Lee Moore, Milan Nostersky, Marcela Zachariasova. +Jeremy Bennett, Mary Bennett, Simon Davidmann, Neel Gala, Radek Hajek, Lee Moore, Milan Nostersky, Marcela Zachariasova. === Document history [cols="<1,<2,<3,<4",options="header,pagewidth",] |================================================================================ | _Revision_ | _Date_ | _Author_ | _Modification_ +| 1.12 Draft | 22 November 2018 | +Simon Davidmann | + +Updated notes on Test Suites. | 1.11 Draft | 21 November 2018 | Neel Gala | @@ -226,30 +230,8 @@ The _test reference signature_ is the _test signature_ saved from an execution r Tests are grouped into different functional test suites targeting the different subsets of the full RISC-V specifications. There will be ISA and privilege suites. -Currently there is one test suite: the RV32I (developed by Codasip). - -Test suites will be developed in this priority order: - -[options="compact"] -* RV32I -* RV64I -* RV32IM -* RV64IM -* RV32IC -* RV64IC -* RV32IA -* RV64IA -* RV32IF -* RV64IF -* RV32ID -* RV64ID -* RV32E -* RV32EC -* RV32EA -* RV32EF -* RV32ED - -This order is subject to ratification by the Compliance Task Group +For information on the status of the different test suites, look here: link:../riscv-test-suite/README.md[../riscv-test-suite/README.md] + === The test framework diff --git a/riscv-test-suite/README.md b/riscv-test-suite/README.md new file mode 100644 index 0000000..2b0a35d --- /dev/null +++ b/riscv-test-suite/README.md @@ -0,0 +1,54 @@ +# RISC-V Test Suites + +Tests are grouped into different functional test suites targeting the different subsets of the full RISC-V specifications. There will be ISA and privilege suites. + +For information on the test framework and other documentation on the compliance tests look at : [../doc/README.adoc](../doc/README.adoc) + +Currently there are twelve test suites checked into this repository. + +If you are looking to check compliance of RV32I in user mode then run the suites: RV32I and RV32UI + +Test suites status: + +Pretty Solid: +* RV32I (originally developed by Codasip, updated significantly by Imperas to improve coverage) + * 54 focused tests, using the correct style/macros, excellent coverage of most instructions + * no coverage of fence, scall, sbreak, pseudo and csr instructions +* RV32IM (developed by Imperas) + * 7 focused tests, using the correct style/macros, excellent coverage +* RV32IMC (developed by Imperas) + * 24 focused tests, using the correct style/macros +* RV64I (developed by Imperas) + * 8 focused tests, using the correct style/macros +* RV64IM (developed by Imperas) + * 3 focused tests, using the correct style/macros + +Work in progress (user mode): +* RV32UI (from github/riscv-tests with poor coverage. Ported by Imperas) + * 39 tests, uses original style, user mode, Imperas added signature +* RV32UA (from github/riscv-tests with poor coverage. Ported by Imperas) + * 10 tests, uses original style, user mode, Imperas added signature +* RV32UC (from github/riscv-tests with poor coverage. Ported by Imperas) + * 1 test, uses original style, user mode, Imperas added signature +* RV32UF (from github/riscv-tests with poor coverage. Ported by Imperas) + * 11 tests, uses original style, user mode, Imperas added signature +* RV32UD (from github/riscv-tests with poor coverage. Ported by Imperas) + * 10 tests, uses original style, user mode, Imperas added signature + +Work in progress (starting on privilege modes): +* RV32SI (from github/riscv-tests with poor coverage. Ported by Imperas) + * 6 tests, uses original style, Imperas added signature +* RV32MI (from github/riscv-tests with poor coverage. Ported by Imperas) + * 8 tests, uses original style, Imperas added signature + +To be worked on: +* RV64C +* RV32A +* RV64A +* RV64F +* RV64D +* RV32E +* RV32EC +* RV32EA +* RV32EF +* RV32ED \ No newline at end of file